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Venice rumors here please!

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I'm sure every reviewer is out of his mind and brainwashed by AMD !!!!!!s.
 
i have a question how can you use a site comparing a 3.2e prescott to a 3.4extreme edition for a good comparison of northwood vs prescott...you are aware that the p4 extreme editions (at least on socket 478) are NOT northwoods they are gallatins....
 
cell_491 said:
i have a question how can you use a site comparing a 3.2e prescott to a 3.4extreme edition for a good comparison of northwood vs prescott...you are aware that the p4 extreme editions (at least on socket 478) are NOT northwoods they are gallatins....

I wasn't comparing performance but talking about the pipeline issue, which I believe, is still valid.
 
Hmm.. doesn't someone's sig say simply to not argue with Eclipse? :confused: This really wasn't quite the place for it anyway, at least, not what it's become.

Well.. maybe we'll be able to find it and order it before the end of the week so it can get shipped? I'm in the same straits as a few of you; every last component, except the Venice :(
 
Hito Bahadur said:
I'm sure every reviewer is out of his mind and brainwashed by AMD !!!!!!s.

I think my questions were valid ones... Must you give such a childish answer?
Anyway, here's an article that at least confirms that I'm right about the P4 having more than 20 stages: http://arstechnica.com/articles/paedia/cpu/p4andg4e.ars/1
Sadly it doesn't say how many, and it doesn't say which core it's discussing... although I assume it's Willamette.
And it still doesn't give us any insight in WHERE the Prescott's pipeline extensions were done, and how they would affect the critical path.

edit: it DOES say how many, I just read over it: http://arstechnica.com/articles/paedia/cpu/p4andg4e.ars/5

The decoding and translating steps that are necessitated by a trace cache miss add another eight pipeline stages onto the beginning of the P4's pipeline, so you can see that the trace cache saves quite a few cycles over the course of a program's execution.

So you can see I wasn't pulling that 28 stage figure out of my arse... 20 stages critical path + 8 stages tracecache == 28 stages total pipeline.
Now the question remains: How does Prescott differ here?
 
I'm sorry I've added soo much off-topic discussion to this thread....

Sometimes you can't see the fire because of the flames :p

I have to say that I am waiting more for dual core than venice, but that is because I fold, do a lot of encoding and am pretty happy with my current gaming capability.
 
Hito Bahadur said:
Here's the fact that Northwood is 20-stage (unless you would like to argue that Intel is an unreliable source):
http://www.intel.com/cd/ids/developer/asmo-na/eng/microprocessors/19933.htm?page=3

edit:

And here is the 31-stage Prescott pipeline:
http://www.intel.com/technology/itj/2004/volume08issue01/preface.htm

Regardless of Gallatin/Northwood or Prescott, Intel went from 20-stage to 31-stage......

Thank you for completely ignoring my points, and continuing to spam URLs that do not address the issues that I bring up.
Looks like you don't even understand what I'm talking about in the first place.
 
Scali said:
I think my questions were valid ones... Must you give such a childish answer?
Anyway, here's an article that at least confirms that I'm right about the P4 having more than 20 stages: http://arstechnica.com/articles/paedia/cpu/p4andg4e.ars/1
Sadly it doesn't say how many, and it doesn't say which core it's discussing... although I assume it's Willamette.
And it still doesn't give us any insight in WHERE the Prescott's pipeline extensions were done, and how they would affect the critical path.


It can be frustrating when all you provide is arguements. Trust me, if you could quote better facts I wouldn't be so childish.

edit: Apparently, no one knows what you are talking about.
 
cell_491 said:
was gallatin a 20 stage core? i thought it was like 24 or somthin

GamePC thinks the Gallatin is a 20-stage core.... (Sorry, in advance, for the link spamming :p )
http://www.gamepc.com/labs/view_content.asp?id=p4346ee&page=2

QFL (Quote for Lazy): "The 3.46 GHz EE is based on Intel's "Gallatin" processor core, the same core which has been used in all previous EE variants and for Intel's Xeon MP processor line. The Gallatin processor core's claim to fame is its whopping 2MB of on-die L3 cache, in addition to its standard 512k of L2 cache, adding up for a whopping total of 2,568k of on-die, full speed cache. The Gallatin is also more efficient per clock cycle compared to the Prescott processor core of the Pentium 4, as the Gallatin core features a 20-stage pipeline compared to the Prescott's elongated 31-stage pipeline."
 
well your right but what again does any of this have to do with VENICE....what we really should be wasting our time on is finding out where we can buy these friggin things!! :D
 
well i ment that they probably have it on their site and everyone is buying them so the site crashed :)
 
Hito Bahadur said:
It can be frustrating when all you provide is arguements. Trust me, if you could quote better facts I wouldn't be so childish.

edit: Apparently, no one knows what you are talking about.

I've posted some links now, that prove that I am at least on to something. As you can see, the 28 stage pipeline figure is real... we just have to figure out how to fit the Prescott's 31 stage pipeline figure into the story. I'm not quite sure yet... but that link to the Prescott architecture that you posted, seems to indicate that the critical path hasn't changed much, if at all (which is exactly what the latency and througput figures that I brought up earlier, indicate). The block diagram seems identical to the Willamette/Northwood cores.
 
well i ment that they probably have it on their site and everyone is buying them so the site crashed
LOL naw man my last post was for Hito i understood your post...its either what you said or maybe they took the site down to add a few new products like VENICE!!!
 
unfortunately, it is easier to find out the length of a Prescott pipeline than it is to find a place to buy Venice cores.
 
Hito Bahadur said:
I have to say that I am waiting more for dual core than venice, but that is because I fold, do a lot of encoding and am pretty happy with my current gaming capability.

I'm not counting on excellent compatability, but I'm hoping the drop-in compatability with current socket 939 boards will enable me to jump on that bandwagon too some time early next year when things have stabilized and gaming performance on a dual core is closer to that of a single core. I just really suspect NF4 won't be able to milk it for all its worth.. but need a comp now anyway.

And yeah, dual core will be great for folding; suddenly about twice the power per new computer!
 
newegg just came back up, did a search on venice, while it was searching i swear my heart stopped.
 
this is gay so im going to have to throw an intel reference into it,when the prescotts were released it showed up on directron the very next day...
 
cell_491 said:
this is gay so im going to have to throw an intel reference into it,when the prescotts were released it showed up on directron the very next day...


I guess we will have to wait for venice to be released then.
 
robberbaron said:
I dont know. There's no way to tell there. I think both venice and winchester have the same TDP, but I'm not totally sure.


Yeah, same TDP. I sure can't tell from what is on their site.
 
crypt1c.0 said:
2 words for intels market domanice... Blue men!!!! The average american consumer is stupid. They buy what ever product has the best advertising.


Does AMD even have advertising outside of the web? I don't think I have ever seen any, but I could be wrong.
 
some one pm kyle and ask him with all his power of persuasion to mabye get a difinitive release date on venice from amd...amd will tell kyle more than they will tell us thats for sure.
 
Scali said:
Apparently this is 'one of the key pipelines', and has to do with branch prediction/recovery.
I interpret that as the CPU looking further ahead to predict branches, in which case it would be an advantage, not a disadvantage. But what other 'key pipelines' are there then, and how long are they?
the x87 part of the processor.
i know that on the a64, the integer and branch code goes through a 12 stage pipe and the floating point stuff has a 16 stage pipe.
also, if northwood's 20 stage pipeline has 8 stages of branch prediction, and prescott's branch prediction is more robust, wouldn't it make sense that it's even longer? even if it isn't, that's 28 vs 39. though i really don't think it's still 8 stages. look through ars. they normally have some pretty good technical stuff. i'll go digging for things in there now


baron: yeah, TDP is constant. we'll probably go back to having more chips being marked down from demand if yeilds turn out to be any good.. cause i don't think venice is gonna be any hotter on average than winchester, and it'll clock better, so.. yeah

hito: "It can be frustrating when all you provide is arguements."
believe me, i know that frustration ;)

to whoever said that someone's sig said not to question me.. that would be mine :D
though baldrik is the one who said it
 
(cf)Eclipse said:
there used to be 3 pdf's on amd's server saying that the new revision would hit retail on the 4th and some other models.. i think the 10th. the pages got taken down though :( (or renamed, i dunno)

edit:

http://www.amd.com/us-en/assets/content_type/DownloadableAssets/Rev_change_1_UK.pdf
http://www.amd.com/us-en/assets/content_type/DownloadableAssets/Rev_change_2_UK.pdf
http://www.amd.com/us-en/assets/content_type/DownloadableAssets/Rev_change_3_UK.pdf
from earlier in this very thread. shipping today, which means probably in retail within a week.
 
well if i only have to wait a week then its no big deal but if i have to wait more than that then im buying a winny
 
Rumor: Venice tomorrow.. maybe even DC opteron.

Source? On the Anandtech website, in a post by Anand himself (comments to todays P-EE review), he said that he has another NDA tomorrow morning, and then would get back to more interesting benchmarks with the P-EE and P-D. I'm willing to bet that the NDA coming up tomorrow morning is infact Venice and possibly dual core opterons (would NOT suprise me at all, since I saw on the INQ that AMD was going to deliver dual core opterons early in Q2, and it is early Q2). It would be a good way to counter all this Intel PR.
 
i don't think there's an nda on venice.. though i could be wrong.
dual core opterons? definitly can see that. and it would make sense considering intel's dual core announcements.
 
that's been around for a while. look closely at the chart on the bottom, AS denotes dual channel clawhammer.. which definitly doesn't agree with the 90nm and 1.4v..
 
cell_491 said:
some one pm kyle and ask him with all his power of persuasion to mabye get a difinitive release date on venice from amd...amd will tell kyle more than they will tell us thats for sure.

But what if he has a Venice chip or something else but cant speak. I havn't noticed a lot of tech sites talking about anything, just people who seem to have nabbed some chips under secrecy.
 
yeah.. though some sites have reviews up, like x-bit labs. if they managed to get one and not have an NDA like we're assuming everyone else has now.. that's curious.
i still think the NDA only pertains to dual core, but who knows. i'm rarely right :cool: :p
 
(cf)Eclipse said:
i still think the NDA only pertains to dual core, but who knows. i'm rarely right :cool: :p

true. they usually dont NDA core changes. then again, cough, 4200+
 
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