Volta's SM architecture seems to be a very big departure for their previous array's and anything else out there. There really is not enough information on them to draw reasonable explanations yet, from performance, organizational, data structuring or routing yet.
It's just like when everyone though Pascal wasn't capable of async compute, when nV first did their presentations on it, because it didn't have dedicated hardware to do it. Its just crazy that people would think GPU instruction sets are done through drivers.
Yeah.
Nvidia has been researching better optimised comiler algorithms and Volta seems to have potentially some aspects of those presented papers; some of it comes back to Krashinsky (freaking smart and linked some of his stuff in the past on B3d).
IMO comes back to Temporal-SIMT work Nvidia has been doing since 2013, along with compiler-algo improvement.
Different R&D path to AMD.
Cheers
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