Seiki SE50UY04 3840x2160 50" TV ($1300)

I got the Ergotron MX arm and installed it on the 39".
I wouldn't recommend it though, because there's not enough height extension for the monitor to clear the desk - at most it will go at a maybe 5% tilt backwards, with the bottom bezel resting on the desk. The VESA mount holes are just too high on the TV.

IMG_0260.JPG

IMG_0262.JPG


I like how that stand sits it on the desk.:)
 
Really close to pulling the trigger on the 39" with that stand but my GPU doesn't have HDMI out, only DVI-D and Display port


anyone if this monoprice displayport-HDMI adapter would work?



g6qj4zf.jpg


:confused:
 
Really close to pulling the trigger on the 39" with that stand but my GPU doesn't have HDMI out, only DVI-D and Display port


anyone if this monoprice displayport-HDMI adapter would work?



g6qj4zf.jpg


:confused:

There is only one adapter that will for sure work and its unfortunately out of stock:

http://www.accellcables.com/B086B-003B-2.html

My dad also got the passive version (dp 1.1 -> hdmi 1.4) and it didn't work so i would only trust the active one.

My dad uses the active one to run the 39 inch seiki off an eyefinity 6 card. I also was able to do it to run it on mac os X on my macbook retina pro as well.
 
Good news. I stopped by seiki today because my email about the 120Hz issue had gone unanswered for 2 weeks. Anyway It talked to the same guy I did like 3-4 weeks ago when I wanted to demo a 39 inch unit.

He actually said that he received an email about the 120hz issue just today (I wonder if it took that long for my email to trickle down the ladder as I sent it on 7/20) and he said they are aware of the issue and will fix it probably with a firmware update.

I wasn't sure if the fact it did 120Hz was just an added bonus or they actually meant for that to happen which is why I wanted some answers. He told me they expected it to do 120Hz and that is a problem (and it had some other bugs too that they are working on). So hopefully there will be a fix soon for that.

I also asked if they had looked into or were at all interested in adding display port to their displays. Not sure if he was just giving me a line but he said they are actually doing some active R&D on possible display port connectivity for better use as a monitor/higher refresh rate. Sounded good.

I am really happy to hear the 120Hz issue should eventually get fixed. That's the only thing bugging me about the display right now.
 
There is only one adapter that will for sure work and its unfortunately out of stock:

http://www.accellcables.com/B086B-003B-2.html

My dad also got the passive version (dp 1.1 -> hdmi 1.4) and it didn't work so i would only trust the active one.

My dad uses the active one to run the 39 inch seiki off an eyefinity 6 card. I also was able to do it to run it on mac os X on my macbook retina pro as well.


What about a DVI-D to HDMI?

ELvQRO9.jpg



I noticed a review on Amazon stating that it worked, but don't know if I can trust that.



I wonder why the adapters won't work as both DVI D and Display support 4k AFAIK :confused:
 
What about a DVI-D to HDMI?

ELvQRO9.jpg



I noticed a review on Amazon stating that it worked, but don't know if I can trust that.



I wonder why the adapters won't work as both DVI D and Display support 4k AFAIK :confused:
It can do 4k @30Hz but don't expect the bandwidth of 1440P @ 135Hz as reported possible over DVI since HDMI is actually DVI single link (with some un-needed extras)
 
Is there a noticeable difference between 60hz vs 30hz when gaming?
Yes but it is more in terms of input lag than visuals.
For example if you see someone play on it it will look smooth whether it is 30 of 60 but the person is only able to play if his coordination adopted to the 30Hz.

I enjoy 40Hz more than 30Hz since 30Hz somehow makes my mouse feel really really slow.
I would like 60Hz on my 4k screen which is just a matter of time.

The difference is definitely perceivable, and no doubt 60Hz is better. How much it adds to gaming is debatable. For me, 60Hz -> 120Hz is not perceivable.
I tried 60 vs 120 it was smoother but not a night and day difference nice but not as good as a better screen that is for sure.
 
houkouonchi, did you ever hear back from them about the firmware update for the 39"? Itching to pull the trigger on this still.
 
What about a DVI-D to HDMI?

ELvQRO9.jpg



I noticed a review on Amazon stating that it worked, but don't know if I can trust that.



I wonder why the adapters won't work as both DVI D and Display support 4k AFAIK :confused:

Don't exepect that to work at all.

DVI when > 165 Mhz is dual link DVI (dual TMDS). HDMI 1.3/1.4 which goes >165 mhz is still slingle link (single TMDS) so they aren't really compatible withe each other. When I tried an adapter because my video card was outputting dual link DVI it was dropping half the veritical resolution to the display and it was deteced as 3840x1080 or osmething (or maybe it was 1920x2180) but either way it wont work.

houkouonchi, did you ever hear back from them about the firmware update for the 39"? Itching to pull the trigger on this still.

Nothing new yet but they did pretty much commit to me that they would fix it.
 
For the 4k@120Hz project, I'm doing some information gathering on what sort of electronics are required to accomplish this.

1. if you work in the industry and design LCD controller boards, and are willing to help answer some basic questions, would you please drop me a PM (private message) here, or send it to ubiquityman at either yahoo or gmail.

2. if you have a schematic of the electronics for a 1080p display, LCD or Plasma, that you are willing to share, would you please send that my way?

Thanks.
 
I've been thinking why not use multiple boards instead of having something made.
I've disassembled an old 15 inch with LMDS to test my theory and you could feed half the horizontals from one link and the other half from the other.
Even better would be if we could divide it in portions considering a non cheap timing controller can handle a 300MHz pixel clock we could get it all the way up to that magic 120Hz.

The Asus screen(31.5 IGZO model) has 4 lvds cables what if we could hook up a separate board to either of those.
Now I don't know how the Asus puts those on the screen and I'm not yet sure if it is an universal standard but that would potentially give us 1200MHz total (not correct as you might push more over a smaller link once you reduce blanking so 4x 300MHz)

This should give us enough bandwidth and the ability to drive it with 4x 960x2160 @120Hz
An AMD eyefinity setup would probably do better until if ever Nvidia gives official support.
What do you guys think on this approach.
What I'm most curious about is if the LVDS transfer "standard" is a standard or different per lcd?

Essentially we can reduce it to 3 boards if we somehow get that cable splitter over them since there are some controllers that do all the way up to 340 and I'm sure if we look we can fine some that do 400 for sure.
Considering there are boards that do 135Hz @ 1440P that would give them a potential pixel clock of ~560MHz which would make us only need 2 of them having 2 of those cables per board <- most optimal scenario.
 
I've been thinking why not use multiple boards instead of having something made.

Are you thinking of something that fits inside the monitor? Or will it have a new plastic casing? Or were you thinking it would look like a proof-of-concept solution with the additional board hanging out the back?


I've disassembled an old 15 inch with LMDS to test my theory and you could feed half the horizontals from one link and the other half from the other.
Even better would be if we could divide it in portions considering a non cheap timing controller can handle a 300MHz pixel clock we could get it all the way up to that magic 120Hz.

Would this be even/odd or top/bottom half?
The top/bottom would be a lot easier provided the video card can do 3840x1080 as two-screen top/bottom function is already built-into the video card drivers. The even/odd, I'm not sure if a video card can do that to two HDMI outputs.

However, even with the top/bottom split, will the Windows software drivers support a combined "full-screen" to both halfs of the monitor?

The Asus screen(31.5 IGZO model) has 4 lvds cables what if we could hook up a separate board to either of those.
Now I don't know how the Asus puts those on the screen and I'm not yet sure if it is an universal standard but that would potentially give us 1200MHz total (not correct as you might push more over a smaller link once you reduce blanking so 4x 300MHz)

Are you suggesting 4 external HDMI connections? i.e. 4 board for 4 HDMI connections would mean 2 video cards with 2 HDMI out each would it not? While possible, that's going to diminish the attractiveness for a lot of folks.
 
Are you thinking of something that fits inside the monitor? Or will it have a new plastic casing? Or were you thinking it would look like a proof-of-concept solution with the additional board hanging out the back?
You could house them internally since the monitor has quite a lot of space internally since it is huge and those boards aren't that big I'm excellent in stacking pcbs together. :D

Would this be even/odd or top/bottom half?
The top/bottom would be a lot easier provided the video card can do 3840x1080 as two-screen top/bottom function is already built-into the video card drivers. The even/odd, I'm not sure if a video card can do that to two HDMI outputs.

However, even with the top/bottom split, will the Windows software drivers support a combined "full-screen" to both halfs of the monitor?
It Sadly was the whole screen with half the horizontal lines so line nothing line which gives a blured image but enough to see what was on the screen I concur that this would be hard to have the driver understand as you would need a 4x duplicate that somehow fills only those lines.
That is why I sugested that it would be easier if it divided it like we already see with the sharp and asus screens today.

Are you suggesting 4 external HDMI connections? i.e. 4 board for 4 HDMI connections would mean 2 video cards with 2 HDMI out each would it not? While possible, that's going to diminish the attractiveness for a lot of folks.
I suggest any connection be it DP HDMI or DVI all suffice for this HDMI however is a licensed standard not that that matters for board that are already made.
2x dual link DVI should suffice in terms of bandwidth and connectability.
If there were 1440P DP board that also were able to get to 120/135Hz @1440P that would be great since most AMD cards have 2 DP ports.

One thing is certain it won't be possible to use the input board that is already in the monitor since it will only let one signal trough at a time since the normal controller couldn't take more anyway.

Before I can proceed with this idea I have to figure out if LVDS is a standard that can be switched universally between lcd's only if so we can pick the board we want presumably overlord boards.
 
Are you suggesting 4 external HDMI connections? i.e. 4 board for 4 HDMI connections would mean 2 video cards with 2 HDMI out each would it not? While possible, that's going to diminish the attractiveness for a lot of folks.
Ideally, we'd want a board that can do either 4K60 and 4K120, unless you had to stick to one. I'd be wanting to go all the way to 4K120 as my $1000 pledge is conditional on 4K120.

2x dual link DVI should suffice in terms of bandwidth and connectability.
If overclocked, perhaps. You'd want to make it strong and robust enough to be a 4K60 to a reliably overclockable to 4K120Hz (Since 4K60Hz over one DVI cable is beyond DVI spec, but technically reachable via an overclock, as 2560x1440 120Hz is fairly close to 3840x2160 60Hz). But for non-overclocked, you need 2xDP for 4K120Hz.
 
But for non-overclocked, you need 2xDP for 4K120Hz.

Single DP could be enough. You need 1066 Mhz pixelclock (or bandwidth of pixel clocks) in order to push 120 Hz @ 3840x2160 with cvt reduced timings. DP 1.2 is 960 Mhz of pixelclock bandwidth so that is actually very close and possibly doable by reducing the timings even more.
 
Ideally, we'd want a board that can do either 4K60
If overclocked, perhaps. You'd want to make it strong and robust enough to be a 4K60 to a reliably overclockable to 4K120Hz (Since 4K60Hz over one DVI cable is beyond DVI spec, but technically reachable via an overclock, as 2560x1440 120Hz is fairly close to 3840x2160 60Hz). But for non-overclocked, you need 2xDP for 4K120Hz.
Dual link DVI doesn't have a max pixel clock specification.
DVI dual link would be a good choice since most card have it or can have it and the overlord boards are available.
All we need to know if it is possible to hook them up to a panel that is not one of those Korean panels.

Single DP could be enough. You need 1066 Mhz pixelclock (or bandwidth of pixel clocks) in order to push 120 Hz @ 3840x2160 with cvt reduced timings. DP 1.2 is 960 Mhz of pixelclock bandwidth so that is actually very close and possibly doable by reducing the timings even more.
1097MHz with cvt reduced blanking but even if you had no blanking in the stream (no monitor is that tolerant) you would need 995MHz for 3840x2160 @ 120Hz.
I'm pretty sure it is locked to 960 just as we've seen earlier with the ramdacs also that 960 is what can be done but the chances of the signal having problems are definitely there.
 
1097MHz with cvt reduced blanking but even if you had no blanking in the stream (no monitor is that tolerant) you would need 995MHz for 3840x2160 @ 120Hz.
What about 4:2:2 instead of 4:4:4?
I'll settle for 4:2:2 at 120Hz, and 4:4:4 at 60Hz.

120Hz over a single DisplayPort would be quite something, and a huge simplification!
 
What about 4:2:2 instead of 4:4:4?
I'll settle for 4:2:2 at 120Hz, and 4:4:4 at 60Hz.

120Hz over a single DisplayPort would be quite something, and a huge simplification!
A single DP connector would need a spliter to get the links devided in the various boards which is not something available or easily made.
I talked with Modernmike over at OCN who thinks that we might be able to hook up digferent boards if it is indeed LVDS we won't know until it is opened up though.
I'm quite confident that there is a way to make it work with multiple driver boards without having to gimp on image quality that would be a bork.
 
Hi I am new here - actually registered just because of this Seiki thread. I am based in London. I have bought this 50" Seiki via Amazon USA and organized to send it over to the UK. I may be one of the first having this beauty in the UK/London.
Somebody has mentioned would like to know what is inside... well here we go:
1. LCD panel Chimei Innolux V500DKI-LS1.
2. Power Supply Unit Megmeet MP118FL - I could not find any specification
3. Unknown Seiki (?) motherboard:
SY 13036
P/O SP4D1 - 13030583
Board Version ST2975K R10.3

Opening is a question of some 10-15 min and is very deadly easy.
And now a few images. I am sorry for the quality - My mobile phone is not the best one...

http://imageshack.us/photo/my-images/823/o7nq.jpg
http://imageshack.us/photo/my-images/534/wkja.jpg
http://imageshack.us/photo/my-images/4/ntfw.jpg
http://imageshack.us/photo/my-images/9/yq46.jpg

Sinuhet
 
Last edited:
Does anyone know if this cable will allow me to use the Seiki 39in (SE39UY04) with 30hz on the rMBP running OSX 10.7.5 with NVIDIA GeForce GT 650M
http://www.accellcables.com/B086B-008B-2.html

Yes it will. I used the DP version (with a mini DP -> DP adapter) but that worked with my macbook pro retina 15 inch (geforce gt 650) which is running os X 10.7.4 to drive the seiki at 3840x2160@30Hz with no issues. Also worked in linux and windows as well.

Only difference between that one and the one I got is its mini DP. Mine was the DP 1.1 to HDMI active adapter.
 
Hi I am new here - actually registered just because of this Seiki thread. I am based in London. I have bought this 50" Seiki via Amazon USA and organized to send it over to the UK. I may be one of the first having this beauty in the UK/London.
Somebody has mentioned would like to know what is inside... well here we go:
1. LCD panel Chimei Innolux V500DKI-LS1.
2. Power Supply Unit Megmeet MP118FL - I could not find any specification
3. Unknown Seiki (?) motherboard:
SY 13036
P/O SP4D1 - 13030583
Board Version ST2975K R10.3

Opening is a question of some 10-15 min and is very deadly easy.
And now a few images. I am sorry for the quality - My mobile phone is not the best one...

http://imageshack.us/photo/my-images/823/o7nq.jpg
http://imageshack.us/photo/my-images/534/wkja.jpg
http://imageshack.us/photo/my-images/4/ntfw.jpg
http://imageshack.us/photo/my-images/9/yq46.jpg

Sinuhet
Any chance you can remove the EMI shield and take some pictures underneath it?
depending on how the timing controller is connected to the panel we can start planing our way around it.
 
I may as well join this conversation. Hey maarten12100 :)

Actually the panel datasheet tells us most of what we need to know. For instance we know the panel takes 4-channel LVDS which can interpret either VESA or JEIDA packing, we know that it is made to run at up to 120Hz (awesome), and interestingly it is 3D-capable. We also know (unfortunately) that it is apparently interlaced pixel arrangement, which makes driving interesting.

Starting to think this might be best handled by an FPGA... four inputs of x format, four independent LVDS outputs, and a FPGA to take these and twiddle the bit packing around to produce the proper drive format for the panel.
 
Sinuhet,

If you still have it apart, would you be able to take a few macro images of the board and the chips that are on there. I know the main chip is covered with a heat sink but there are a few smaller ones around the heat sink. Also the labels did not turn out very clear. If you get more light the camera shutter speed will be faster and have less blur.
 
Really dumb question,

How does this work as a computer monitor. Is it worth getting or is it better to get 3 30" 1600p monitors. It's weird the ASus 31.5" is $3,900 but this is more than half....
 
Really dumb question,

How does this work as a computer monitor. Is it worth getting or is it better to get 3 30" 1600p monitors. It's weird the ASus 31.5" is $3,900 but this is more than half....
You pay for the IGZO panel's R&D + a huge early adopters fee + the extra driver board.
I'd say if you don't do colour intensive work as in video/photo editing you should be better of getting a Seiki or a different 4K UHD screen on the cheap.
You could also wait for 60Hz to come to the line up for a lower price though Asus will mark it up to ridiculous numbers for a board that didn't cost them that much.
 
I may as well join this conversation. Hey maarten12100 :)

Actually the panel datasheet tells us most of what we need to know. For instance we know the panel takes 4-channel LVDS which can interpret either VESA or JEIDA packing, we know that it is made to run at up to 120Hz (awesome), and interestingly it is 3D-capable. We also know (unfortunately) that it is apparently interlaced pixel arrangement, which makes driving interesting.

Starting to think this might be best handled by an FPGA... four inputs of x format, four independent LVDS outputs, and a FPGA to take these and twiddle the bit packing around to produce the proper drive format for the panel.
Hey Mike :cool:

The only way to drive the interlaced pixels would be to have a duplicate running on each adapter which somehow blocks the streams that aren't being displayed by that specific adapter which sadly is nearly impossible.

I've actually contacted a company that does work with fast FPGA's to do these kinds of things but they said the R&D wouldn't be fund-able unless 30k/50k of those board were made/sold.

If that person can remove one of the ribbon cables we will know what one does if 1/4 of the in between pixels goes black we know for sure that it is indeed interlaced.
If a quarter of the panel goes black we've hit the jackpot.
 
Hi maarten
I could reopen the TV during the weekend again. I should have better camera at that time. I just need you to tell me exactly what I should be looking for (yes I am not so technically educated as some other folks here).
I would suggest you edit my following image and post it back here.

http://imageshack.us/photo/my-images/823/o7nq.jpg

I will try to make better images of the mainboard as well. Somewhere I have seen it is using a REALTEK RTD2975K chip for video processing which may well fit the "board version ST2975K R10.3" which written is on a sticker on the board.
 
The only way to drive the interlaced pixels would be to have a duplicate running on each adapter which somehow blocks the streams that aren't being displayed by that specific adapter which sadly is nearly impossible.
[snip]
If that person can remove one of the ribbon cables we will know what one does if 1/4 of the in between pixels goes black we know for sure that it is indeed interlaced.
If a quarter of the panel goes black we've hit the jackpot.
The photos show that they're not ribbon cables, they're discrete wire twisted pairs. I only see two connectors, and it is very common for two LVDS channels to share a connector (where they are referred to as "odd" and "even" channels, presumably for which of the interlaced set they carry). The panel datasheet notes not "odd" and "even" but "first pixel", "second pixel" etc, which is why I think it's so likely that it's 4-channel interlaced.

Given the power of an FPGA, I don't think driving the panel would actually be that difficult. I would approach it on the host side as driving quadrants, then use FPGA logic to rearrange the normal single channel pixel arrangement (1, 5, 9...) to a quadrant layout (1, 2, 3...). That should be perfectly doable - although it will ideally need a host that can span four monitors, something like an Eyefinity6 rig.
 
I will try to make better images of the mainboard as well. Somewhere I have seen it is using a REALTEK RTD2975K chip for video processing which may well fit the "board version ST2975K R10.3" which written is on a sticker on the board.

That is incredibly useful. Now if I can only find the datasheet. Realtek does not seem to have it on their website.
 
I can find no information on the RTD2975, but there are some new releases on the RTD2995. No datasheets for either. These are SoC solutions so it's possible that a new SoC solution may released that is a drop-in replacement but with DP input or higher refresh rate on HDMI. This would simplify things a lot! We'd still have to write custom software for it, but at least the hardware solution would be much easier.
 
That is incredibly useful. Now if I can only find the datasheet. Realtek does not seem to have it on their website.

well I could not find the datasheet either. But even if you take a look with "0000" code in the "version info" in the TV software then it states clearly Board version: ST2975K_R10.3
Btw the following link confirms the realtek as well:
http://static.highspeedbackbone.net/pdf/Seiki SE50UY04 4K2K LED HDTV Data Sheet.pdf

anyway I have the feeling that the Realtek RTD 2975 is sort of prototype of the Realtek RTD2995:

http://www.realtek.com.tw/press/newsViewOne.aspx?NewsID=300&Langid=1&PNid=0&PFid=1&Level=1

btw I really would like to know which board is in the following TV. it seems to have the same LED panel from Innolux as Seiki, but clearly the board has to be different , because it has ethernet and android into it... watch mainly after the 7th minute
http://m.youtube.com/watch?v=zyphqOTamjU&desktop_uri=/watch?v=zyphqOTamjU
 
Last edited:
The photos show that they're not ribbon cables, they're discrete wire twisted pairs. I only see two connectors, and it is very common for two LVDS channels to share a connector (where they are referred to as "odd" and "even" channels, presumably for which of the interlaced set they carry). The panel datasheet notes not "odd" and "even" but "first pixel", "second pixel" etc, which is why I think it's so likely that it's 4-channel interlaced.

Given the power of an FPGA, I don't think driving the panel would actually be that difficult. I would approach it on the host side as driving quadrants, then use FPGA logic to rearrange the normal single channel pixel arrangement (1, 5, 9...) to a quadrant layout (1, 2, 3...). That should be perfectly doable - although it will ideally need a host that can span four monitors, something like an Eyefinity6 rig.
I've read the pdf just not couldn't because we had a massive power issue down here and nearly all electronics are currently fried. (380V instead of 220/240)
Just replaced the router and am using an alternative screen for now.
As soon as I've replaced my psu on my computer I can shift my focus to this project.

As I was saying it indeed seems like there are 4 pixel lines x 960
Port Channel of LVDS Data Stream
1st Port First Pixel 1, 5, 9, ……1913, 1917
2nd Port Second Pixel 2, 6, 10, ….1914, 1918
3rd Port Third Pixel 3, 7, 11, ….1915, 1919
4th Port Fourth Pixel 4, 8, 12, ….1916, 1920

Since we have the pinout of the timing controller (though I will also check for my 39 inch panel to see if they differ much if at all) it seems like hooking up boards won't be hard but it wouldn't have the appropriate effect.
A lot of what they include in the pinout we don't need it is all DC so ground is easiest thing there is. (3d and such are not a necessity for me)


2 SCL I2C Clock (for mode selection & function setting)
3 SDA I2C Data (for mode selection & function setting)

Those are serial data links but what are they for?
All I've ever done with serial is reset my harddrive firmware and flash a bios onto a router I'm a real nub on that front.

7 SELLVDS Input signal for LVDS Data Format Selection

let's you choose between the Vesa standard and that other one right?

Then we get a whole bunch of pairs which are not screen area specific link one shall do just 1 out of every 4 lines 1,5,9,13 etc How I see it we need to somehow have the links from all 4 groups but only for one part of the panel.
As for programming a FPGA you need to somehow group something that is not a individual cable per signal from 4 different groups.
The fpga would have to somehow differentiate the pulses for which lines there are which to me sounds rather complicated.

all you really need to do it get:
First 1,5,9 up to 957
Second 2,6,10 up to 958
Third 3,7,11 up to 959
fourth4,8,12 up to 960

The thing is how do you get the fpga to put those specific lines together if they aren't predetermined the way I understood it is that the data is send but it isn't that First pair1 only sends data for 1/5th of the screen(in above terms 768 lines)

I don't think something as complicated as this can be done with something like an Arduino though I could be overcomplicating it what do you guys think?
 
I'm not sure what the i2c lane is for. Let's assume we can ignore it, and if it turns out we can't we can always dump the commands it is receiving from a working controller board.

As for the logic for driving the panel with an FPGA... Let me lay out the way I'd approach it, and please feel free to tell me how wrong I am.

Let's start with a LCD panel which claims to be rated at 3840x2160, 120Hz, which is driven by four LVDS channels. Typically, since the dawning days of television, data has been written to the screen one row at a time ("scan line" in the CRT days). In our panel, let's assume that pixel 1 is at the very upper-left corner, and that because we write to the panel row-wise, pixel 2 is just to the right of that one, pixel 3 just to the right of that, and so on to pixel 3840, at the very righthand side of the panel, pixel 3841, the first pixel in row 2, etc. We will assume this because to my knowledge the datasheet for the panel doesn't make this explicitly clear, which is odd - many (most?) other panels do.

But no matter. We assume that the panel is capable of "120Hz" - or, one complete refresh every 1/120th of a second. If we must fill 3840x2160=8294400 pixels every 1/120 of a second, we must fill 995328000 pixels per second. That's a whole lot of throughput! But let's assume for now that it's a reasonable number. We will refer to this 1Gpix/s number as P_rate.

Now we want to drive this panel. Assume we have a host system that has four video outputs. We want to drive the equivalent of four 1920x1080 displays at 120Hz to make up our one large one, and we would like the image to fill the screen properly, so we will assume we have a host capable of arranging the panels in a 2x2 grid and treating like a single monitor (think Eyefinity). Now assume we take our four outputs and feed them through converter boards to derive four LVDS channels. Each channel is displaying 1920x1080x120=248832000 pixels per second. We'll call this P_rate_q. Easy so far, yes?

What we now have, ideally, are four LVDS channels which are all synchronized to the same clock and produce four pixels simultaneously. Unfortunately for us, these pixels are 1, 1921, 1843201, and 1845121. That's not very useful. We really need pixels 1, 2, 3, and 4 right now. But! If we can store pixels 1921, 1843201 and 1845121 for now until we need them, and wait 1/P_rate_q, the upper-leftmost display will now be sending data for pixel 2, and the others will be sending 1922, 1843202, ... you get the idea. In fact if we store all of this data for one complete refresh cycle (1/120 second), we will have the entire image at our fingertips.

Now that we have the entire image, we can begin to write the picture "our way". We'll create four LVDS outputs, and start feeding out data, pixel 1 to output 1, pixel 2 to 2, 3 to 3, 4 to 4, 5 to output 1 again, and so on. While the data came to us as individual pixels from four quadrants of the display, we can send it out again as sequential data interleaved across four parallel channels.

The question becomes, where do we store 1 billion pixels worth of data? This is a 3-color 10-bit panel even, so we need to store 30 billion bits of data for a very small period of time. No FPGA is going to have gigabytes of blockram to waste on this, so we'll have to store it externally. The wonder of FPGA is we can spawn as many memory controllers as we feel like, and with DDR3's peak transfer rate starting at 6400MB/s (DDR3-800) there's plenty of speed, especially if we interleave the transfers between multiple banks.

Will there be a lag associated with this? Absolutely. This lag is necessarily 1/120th of a second, but may be much longer depending on the access times of the memory controllers. And gigabits of memory is quite a lot to manage, maybe we can optimize things a bit better?

Let's consider a graphics card which is able to drive a monitor of arbitrary resolution. Now let's configure four controller cards to each emulate a 960x2160 display, and use something like Eyefinity 4x1 to array them. Since we don't have to store any data from rows further down the display anymore, we can essentially get away with storing only a single line of the picture at a time. We gather 960 pixels from each of the four controllers, then output that line while we gather the next one. In this way our storage requirements are dramatically cut - now we only need to store 2line x 3840pix x 10bit x 3color = 230400 bits of data, which is well in the range of internal FPGA storage, plus our minimum lag is cut down to (1/120)/2160 second (+ retrieval time)!

Now this does require kind of a beefy FPGA to accomplish, but I'm just trying to say... there are ways to do everything :)
 
Last edited:
The question becomes, where do we store 1 billion pixels worth of data? This is a 3-color 10-bit panel even, so we need to store 30 billion bits of data for a very small period of time. No FPGA is going to have gigabytes of blockram to waste on this, so we'll have to store it externally. The wonder of FPGA is we can spawn as many memory controllers as we feel like, and with DDR3's peak transfer rate starting at 6400MB/s (DDR3-800) there's plenty of speed, especially if we interleave the transfers between multiple banks.

mike,
3840x2160 x 30 bits/pixel = 248 megabits, 1/100th of 30 gigabits.
The screen would only need to hold one frame.
I suppose it's possible that in a worst case situation, it might store 2 frames (one incoming and one outgoing), but that would seem less efficient to me.
Regardless, it shouldn't need to store an entire second worth of data.
 
That would be potentially writing away 2.8GB of data every second than reading it out and putting it on the screen.
But wouldn't that give us a 1000ms delay as it will wait for a entire cycle?
If only each twisted pair was 192 lines that would make my life so much easier.
4 channels just take pair 0 from all 4 and you'll have the first 768 pixels.
Divide the screen up in 5 pieces and you have your needed amount of pixels.
That would be a dream if it was that easy to divide them up into pentdrants.

According to the the max LVDS clock of 79MHz listed in the sheet wouldn't that give us.
4 Channels with 5 pairs each giving 395 per channel which clearly is way more than is needed to drive 120Hz.

The FPGA route needs to be taken by someone preferably with knowledge of Altera or Xilinx FPGA's and knows both hardware and software and also understands the LVDS standard.
 
Glad to hear constructive engineering discussion about pulling off 4K 120Hz!
That would be potentially writing away 2.8GB of data every second than reading it out and putting it on the screen.
But wouldn't that give us a 1000ms delay as it will wait for a entire cycle?
This isn't correct. You only need 64 megabytes of memory for framebuffering two 30-bit frames of 4K. If you need four framebuffers for any reason (e.g. overdrive history framebuffers, OSD overlay framebuffers) then just go for 128 megabytes.

The question becomes, where do we store 1 billion pixels worth of data? This is a 3-color 10-bit panel even, so we need to store 30 billion bits of data for a very small period of time.
Monitors only need to framebuffer a frame or two (not a full second's worth), so you only need 64 megabytes of RAM to framebuffer two 30-bit frames of 3840x2160. This is pretty cheap.

And gigabits of memory is quite a lot to manage, maybe we can optimize things a bit better?
That much memory isn't needed...

Let's start with a LCD panel which claims to be rated at 3840x2160, 120Hz, which is driven by four LVDS channels. Typically, since the dawning days of television, data has been written to the screen one row at a time ("scan line" in the CRT days). In our panel, let's assume that pixel 1 is at the very upper-left corner, and that because we write to the panel row-wise, pixel 2 is just to the right of that one, pixel 3 just to the right of that, and so on to pixel 3840, at the very righthand side of the panel, pixel 3841, the first pixel in row 2, etc. We will assume this because to my knowledge the datasheet for the panel doesn't make this explicitly clear, which is odd - many (most?) other panels do.
Confirming the refresh pattern of the SEIKI can be determined by pointing a high-speed camera at the TestUFO: Flicker Test [WARNING: Do not click if epileptic] running in Chrome browser. High speed cameras such as Casio EX-FC200S and EX-ZR200 can be had for just $200 off eBay, and have a 480fps and 1000fps mode. I used such a high-speed camera with a pre-launch version of TestUFO to create High Speed Video of a 120Hz Monitor.

BTW, one further very interesting idea is adding a strobe backlight modification to the SEIKI 4K HDTV, perhaps using its existing strobe backlight, if it's additionally worthwhile. (e.g. Blur Buster article: Electronics Hacking: Creating a Strobe Backlight). It would reduce motion blur even further, similiar to either nVidia's LightBoost or Sony's Motionflow Impulse. But this is obviously an above-and-beyond endeavour.
 
Last edited:
Back
Top