Question about GDDR5:

[Sojuuk]

Why is it called GDDR5 when it seems to me that it is really GQDR1 (quad-data-rate)?

 

[YeuEmMaiMai]

better go read that white paper again

 

[pxc]

Why is it called GDDR5

Because it's the 5th JEDEC version of DDR. DDR stands for Double Data Rate, which it still is.

From the Samsung product page:

SAMSUNG GDDR5 is a hyper-synchronous, double data rate DRAM, operating at data clock speeds up to 2.5GHz and delivering data at speeds up to 5.0Gb/second.

You were misinformed if you read that it is quad data rate, but I had also seen that (wrongly) implied in a couple of reviews.

The HD 4870 has GDDR5 memory at 1.8GHz DDR (3.6GHz effective), which gives 3.6GHz x 256-bit x 1 byte/8 bits = 115.2GB/s bandwidth

 

[Digital Viper-X-]

Because it's the 5th JEDEC version of DDR. DDR stands for Double Data Rate, which it still is.

From the Samsung product page:You were misinformed if you read that it is quad data rate, but I had also seen that (wrongly) implied in a couple of reviews.

The HD 4870 has GDDR5 memory at 1.8GHz DDR (3.6GHz effective), which gives 3.6GHz x 256-bit x 1 byte/8 bits = 115.2GB/s bandwidth

this is from the H review

For $299 you get a video card that is clocked at 750MHz core, 900MHz memory but using GDDR5 so the memory frequency is double that of double data rate, so it would be 3.6GHz. At 3.6GHz this gives you a memory bandwidth of 115GB/sec.

 

[Sojuuk]

The HD 4870 has GDDR5 memory at 1.8GHz DDR (3.6GHz effective), which gives 3.6GHz x 256-bit x 1 byte/8 bits = 115.2GB/s bandwidth

coulda sworn it was 900x2x2

 

[GoldenTiger]

coulda sworn it was 900x2x2

In practice it is, however that is a misnomer technically as to how it actually works. It's the easiest way to think of it . It is indeed *not* 1800mhz actual frequency though.

 

[pxc]

this is from the H review

I didn't want to name names.

coulda sworn it was 900x2x2

Here's a data sheet if you still don't believe it: http://www.qimonda.com/download.jsp?ref =/qis_docs/Datasheets/Datasheets%20Graphics/IDGV1G-05A1F1C_rev060_www.pdf (remove the space since ref = is blocked here) Samsung's data sheet isn't available yet or I would link that one too.

The GDDR5 SGRAM uses a 8n prefetch architecture and DDR interface to achieve high-speed operation. It can be configured to operate in x32 mode or x16 (clamshell) mode. The mode is detected during device initialization. The GDDR5 interface transfers two 32 bit wide data words per WCK clock cycle to/from the I/O pins

I think the confusion comes from the input clock (Fck) running at 1/2 the memory clock rate, meaning it's doubled internally before being used at the external data bus/clock signals (Wck). But GDDR5 is still double data rate since it only does 2 transfers per clock. And it is odd to specify the clock as 900x2x2 since the memory interface runs at 1800MHz DDR on the HD 4870. The input clock does not run at 900x2x2. And yes, the external memory interface does run at 1800MHz DDR.

 

[Sojuuk]

"For $299 you get a video card that is clocked at 750MHz core, 900MHz memory but using GDDR5 so the memory frequency is double that of double data rate, so it would be 3.6GHz."

from the [H] review. its the wording that got me.

 

[pxc]

But it's not 900MHz memory.

It would be like describing HyperTransport 2.0 in S939/AM2 processors as a 200MHz bus. That is only the input clock speed, which is multiplied on the CPU 5x (default) and uses double data rate links. The HTT bus speed is always written as 1GHz DDR (1000MHz DDR) or 2GHz (2000MHz), not some convoluted description that takes the internal multiplier and reference clock speed as the link speed (unless to illustrate how the link speed is generated).

 

[Nuker]

It is effectively QDR, but still not. Each lane delivers 2 b/clock whereas previous techs only do 1.

 

[pxc]

It is effectively QDR, but still not. Each lane delivers 2 b/clock whereas previous techs only do 1.

No.

DDR does two transfers per clock in all DDRx/GDDRx memory. SDR DRAM does one transfer per clock (i.e. old PC100 memory). It's not "effectively" QDR either (let me tell you about a company named Kentron who was adding a new twist. Using DDR).

I posted the link to the data sheet above if you want to learn about it.

 

[Sojuuk]

But it's not 900MHz memory.

It would be like describing HyperTransport 2.0 in S939/AM2 processors as a 200MHz bus. That is only the input clock speed, which is multiplied on the CPU 5x (default) and uses double data rate links. The HTT bus speed is always written as 1GHz DDR (1000MHz DDR) or 2GHz (2000MHz), not some convoluted description that takes the internal multiplier and reference clock speed as the link speed (unless to illustrate how the link speed is generated).

im not sure if you're still arguing with me because i admitted i got it wrong a while ago and I did read the white paper and i do get it.

 

[pxc]

im not sure if you're still arguing with me

Naw, I just wanted to clarify that 900MHz wasn't the memory speed since the [h] review quote was posted twice. Since it was repeated in other reviews, I wonder if it was in the AMD documentation or just cribbed.

 

[Sojuuk]

Naw, I just wanted to clarify that 900MHz wasn't the memory speed since the [h] review quote was posted twice. Since it was repeated in other reviews, I wonder if it was in the AMD documentation or just cribbed.

it'll get quoted again cause it seems i'm not the only one getting confused by it.

 

[cannondale06]

Naw, I just wanted to clarify that 900MHz wasn't the memory speed since the [h] review quote was posted twice. Since it was repeated in other reviews, I wonder if it was in the AMD documentation or just cribbed.

its been listed at 900mhz EVERYWHERE. even the overclocked and unlocked version mention that they will allow up to 1100mhz for 4400mhz effective. . so is the whole world wrong or just you? surely someone else would have noticed

 

[Zero82z]

its been listed at 900mhz EVERYWHERE. even the overclocked and unlocked version mention that they will allow up to 1100mhz for 4400mhz effective. . so is the whole world wrong or just you? surely someone else would have noticed

He explains why the clocks are listed that way right here:

I think the confusion comes from the input clock (Fck) running at 1/2 the memory clock rate, meaning it's doubled internally before being used at the external data bus/clock signals (Wck). But GDDR5 is still double data rate since it only does 2 transfers per clock. And it is odd to specify the clock as 900x2x2 since the memory interface runs at 1800MHz DDR on the HD 4870. The input clock does not run at 900x2x2. And yes, the external memory interface does run at 1800MHz DDR.

Please come back when you have improved your reading comprehension, KTHXBYE .

 

[cannondale06]

He explains why the clocks are listed that way right here:



Please come back when you have improved your reading comprehension, KTHXBYE .

my point was that NOBODY else has mentioned this when reviewing the cards. so is every tech website really that clueless?

 

[Zero82z]

my point was that NOBODY else has mentioned this when reviewing the cards. so is every tech website really that clueless?

No, they're not clueless, because what they've been saying is also correct. The input clock is 900MHz, and to get the effective memory clock, you multiply that by four. The reason for that is because the external clock of the memory is double the input clock. The effective memory speed is double the external clock, which itself is double the internal clock. Therefore, 3.6GHz = 2*(2*900MHz).

 

[defaultluser]

Folks, listen: this whole multiplying the clock thing is done all the time.

The reason is, a lower-frequency clock is less susceptible to external noise and internal issues like signal reflections on the bus. It's better to send a base clock at some fraction of the speed you eventually want, then use an accurate PLL to multiply that base clock once you've got it on-chip.

BASE CLOCK: 900 MHz

DATA CLOCK: 1800 MHz

DDR then entails that you send data on the falling and rising edge of the data clock, not the base clock. True Quad Data Rate is something entirely different, and requires much more complex equipment than simple DDR signaling, which is why it is never used.

Please note that Intel's FSB is not QDR, it is a 4x-pumped SDR bus. For comparison, AMD's 1 GHz Hypertransport is a 5x-pumped DDR bus.