Performance doesn't scale linearly with transistor count or clock speed even for the same arch. From what we know now its likely GCN will chew up more die space and use more power to get the same performance as VLIW4. The trade off is flexibility similar to Fermi and perhaps better scalability going forward.This time were doing a double die shrink jump going tom 40nm past 32nm down to 28nm. That's an absolute shit load more transistor space and it's not unreasonable to expect an 2 fold increase in performance this time around, especially if were looking at a major (working from the number of stream processors) update in the architecture.