Heatsink Testing pr0n @ [H]

Looks interesting but i thought coretemp was about as accurate as you could get, as it (supposodly) gets the temps from the cores themselves.
 
What'd they do? Cut a recess so the probe was flush?
 
Sweet. :eek:

How did you guys get the prob in there like that or is the chip straight from Intel.
 
It would be cool if you guys could do a little comparison of the temps reported by CoreTemp and the readings you get with your diode setup as well :).
 
Looks like those are photos of how intel does it considering the type of prong on the end of the thermister wire.
 
So are they saying that not even intel themselves trusts their own on die thermistor and chipset reporting? :p
 
And you guys did that on a QX9650?? :eek:

That's not fair. You get to drill a QX9650 and I don't even have one. :(
 
Actually, that looks like a stock K (or is it a J, I dont remember) type thermalcouple. pretty standard stuff really. the connector end is identical to one I used to have that mated with a Fluke meter.

its not really that hard to do what was done to that chip, just need to right tools/facilities. a simple hobbiest mill (like a unimate 3 or similar) will do the work very accurately. it just takes the guts and testicular fortitude to do that.

and for the record, the onboard thermal sensors (whether diodes or resistors) are notoriously inaccurate. Not to mention the typical mobo's ability to read them is about 1/2 as good as the diode/resistor accuracy. There just is not a real valid reason to build the stuff with the extreme accuracy that they could build it to. the cost would far outweigh the benefits.

If this is a chip modifed by [H], then I would be willing to venture that most (if not all) heatsink comparisons in the near future will be done using that chip.
 
hotness!!! kind'a reminds of that one time i made a keychain out of a $300 Pentium 4 CPU... removing IHS is not easy, i'll have you know. :)
 
After review the pics again, I revise my previous statement and say that looks like a T type thermocouple. the temp range of the T type falls right into the range of what we are looking to measure too.
 
If it a possibility, at least the first few times around, test it both this method and the usual method, so we can see the difference, if any.
 
What happens if you lap the CPU? Will the recess in the heat spreader have to be milled deeper? This idea looks gimmicky. If Intel was serious about actually having the user measure temps, then placing it directly inside the heat spreader would work out better.
 
What happens if you lap the CPU? Will the recess in the heat spreader have to be milled deeper? This idea looks gimmicky. If Intel was serious about actually having the user measure temps, then placing it directly inside the heat spreader would work out better.

I am willing to bet that less than 2% of the enthusiast crowd (maybe 20% of all processor owners) actually lap a processor IHS.


On another note, at work, we use only one temp probe or instrument to make those measurements. It ensures that all the data is base lined off of one meter. I know it will take more time for your measurements, but should produce significant let variance from one test to the next. Pairing the probe to the meter permanently also helps keep that number lower.
 
This isn't the first time something similar to this has been done. but so far, it seems to be the best (as in most professional) approach. While other sites have done similar, it *appears* as tho the groove was cut with a dremel (it just dont look clean enough to be done on a mill). The pics shown definately look like it was cut with a mill.


some past attempts to level the heatsink testing field have included using TEC's mounted on cpu sized/shaped metal plates (simulate an IHS) with the thermocouple buried in that. Use of the TEC's allowed more precise control of the amount of heat supplied by the 'cpu' to the heatsink, thus allowing for more precise measuring of the effeciency of the heatsink at removing it from the 'cpu'.

Good idea on using the same thermocouple and meter on every test, does remove one more possible area of error (well, reduces that error factor anyhow)
 
awesome. In your test please compare Coretemp and your readings with your probe. I bet there will be quiet a bit of difference between then two (10*c I'm betting)
 
I commend you for trashing Ntune. Now the bad news.....

Despite a lot of confusion, I find several temp monitoring programs, if you know what you are looking at, are extreamly accurate. This is documented in your own forums and the subject of endless posts trying to educate noobies. The addition of a Tcase temp measurement an enthusiast cannot easily confirm or compare to their own install makes little sense to me.

For anyone curious the method intended to be employed is completely documented in the publicly available Intel document here:"
http://www.intel.com/design/processor/designex/317804.htm
Appendix D starting at page 90

Intel® Core™2 Duo Desktop Processor, Intel® Pentium® Dual Core Processor, and Intel®
Pentium® 4 Processor 6x1 ΔSequence
Thermal and Mechanical Design Guidelines
From section 2.2.2
The Thermal Profile defines the maximum case temperature as a function of processor
power dissipation. The TDP and Maximum Case Temperature are defined as the
maximum values of the thermal profile. By design the thermal solutions must meet
the thermal profile for all system operating conditions and processor power levels.

The slope of the thermal profile was established assuming a generational improvement in thermal solution performance of the Intel reference design....

An even quick review of the knowledgeable posts and published Intel documents would reveal that nothing is going to be as accurate in monitoring the MSR CPU register containing the DTS output. If you don't like the current software it would not take much of a programmer to write a program to read the raw data at whatever rate you desire and log it. Here are the details of the MSR and how to read it.
http://www.hardforum.com/showpost.php?p=1031080147&postcount=5

Some background on the DTS (page 119):
http://www.intel.com/technology/itj/2006/volume10issue02/vol10_iss02.pdf


I just do not see how a Tcase is going to help, as that is all it is, a measurement of the temp at the geometric center of the case where a max recommended temp has been determined by physics and knowledge of the manuf method and little emprical testing. You are making the classic mistake of letting the observation method (case mounted sensor) effect the experiment (disturb the CPU to heatsink interface) when an accurate non-intrusive measurement method(s) are available. It would be valuable in determining if a heatsink conformed to the assumed maximum Thermal Profile established by Intel, that is all. Further I doubt many tested heatsinks will perform worse than the stock intel one and also doubt the bit readers are really interested in, the overclocking results, will have the cpu operating within Intels power envelope anyway.

I am at a loss to make sense of what you are doing and really regret the "back to the stone age" of gluing sensors to dies and IHS's no matter how well it is done. If this is an attempt to differentiate your reviews from another site that just recently figured out coretemp etc. is the way to measure temps for heatsink reviews, I submit this is not the way to do it and you will undo a lot of effort to educate your readers on how to determine cpu temp accurately and what the limits are.

A beg you to do an article based on the above document or at least include the DTS data from the MSR along with the embedded IHS sensor data or at least do a sidebar on the DTS and software to read it. Your approach is not rational.

In the unfortunate case I am still not being understood, just give us coretemp readings with the option "Show delta to Tjunction" checked in the review as well as the Tcase.


Also consider that compared to another site that recently changed its method of measurement, this, despite the "gee look at that" by the unknowledable, does not leave a sophisticated impression with people that are knowledable. This is a blow to the integrity of the site and something I would hate to see happen. I am hoping I misunderstood and the Tcase will not be the sole temp measurements made to evaluate heatsinks in the future.

Please Please Please PLEASE PLEASE think some more about this. Include Tcase if you like but give us the DTS data as well.


------------------------
For those above that expressed an interst in having this done to their processor:

Intel has enabled Therm-x of California to mill the IHS, manufacture the thermocouple
and install the thermocouple on the IHS. The order number is XTMS-1565. Company
contact information: Therm-x of California, Attn: Dan Trujillo, 1837 Whipple Rd, Hayward,
CA 94544, (510) 441-7566 x212
[email protected]

I recommend you save the cash and download coretemp.


-------------------------------

I accidently referenced the core 2 duo data, quad is the same but this is the document that should have been referenced.
http://download.intel.com/design/processor/designex/31559406.pdf
 
Another thought. I know it's probably minimal and also, I don't know the exact material of the thermal reader; I wonder if the loss of metallic surface due to the implementation would lead to a very slight increase in temps.
 
Placesaver while I calculate the surface area loss. Your point is correct. Exact details of the materials used and the exact dimenions of the cut in the IHS is in the documents above with mechanical drawings included. It is fairly small but the gap is filled with epoxy which cannot conduct heat as well as the base metal of the IHS. It is probally trivial and since it is on a reference cpu that will be used with all heatsinks the effect should be the same for all heatsinks as far as impacting performance. The point is Tcase means little, it is the die temp we are really concerned with when OCing the chip.

Edit
Not Epoxy, my mistake.
Fill the rest of the groove with Loctite 498 Adhesive.

with the rounded corners I can only get an aproximation.
area of IHS that contacts heatsink:
C1-C3 = 34.1 - 2.3 = 31.8mm
C2-C4 = 34.1 - 2.3 = 31.8mm
31.8mm squared = 1,011 sq mm

Area of grove:
.38mm x 15.9mm (1/2 of the 31.8mm) = 6.04mm

Area of grove as a percent of total surface area is aprox.

6/1011 = .59% thats POINT 59% I think we can not worry about that and since it is repeated for every heatsink, a constant of the test, it does not matter.

Calibration of the meter used to read the probe and no standard method of deteremining tightening torque of mounting hardware for heatsinks using nuts and screws and/or springs would be of much greater concern to the validity.
 
The point is Tcase means little, it is the die temp we are really concerned with when OCing the chip.

I'm not sure about that. Doesn't Intel report the maximum temp of the chip based on Tcase? If so, knowing the difference between the DTS temp and the Tcase temp would be very useful to help figure out a "safe" long-term temp for overclocking. Realizing that the difference between DTS temp and Tcase is likely to vary chip by chip, but at least you'd have a general idea. Right now, I don't know if anyone really knows how Tcase compares to DTS temp (and temp reported by programs like Coretemp).

Here's the link from Intel about maximum Tcase (near the bottom of the page):

http://www.intel.com/cd/channel/reseller/asmo-na/eng/299986.htm
 
What happens if you lap the CPU? Will the recess in the heat spreader have to be milled deeper? This idea looks gimmicky. If Intel was serious about actually having the user measure temps, then placing it directly inside the heat spreader would work out better.

This one is done exactly to Intel testing specifications. We are using hardware and software temperature monitoring for our testing. Enough people always call into question the software being used to monitor. Now we will have a way to verify.
 
This isn't the first time something similar to this has been done. but so far, it seems to be the best (as in most professional) approach. While other sites have done similar, it *appears* as tho the groove was cut with a dremel (it just dont look clean enough to be done on a mill). The pics shown definately look like it was cut with a mill.


some past attempts to level the heatsink testing field have included using TEC's mounted on cpu sized/shaped metal plates (simulate an IHS) with the thermocouple buried in that. Use of the TEC's allowed more precise control of the amount of heat supplied by the 'cpu' to the heatsink, thus allowing for more precise measuring of the effeciency of the heatsink at removing it from the 'cpu'.

Good idea on using the same thermocouple and meter on every test, does remove one more possible area of error (well, reduces that error factor anyhow)


Yes but we like to have as much "real world" testing as possible where we can do it and still give our readers good evaluations.
 
6/1011 = .59% thats POINT 59% I think we can not worry about that and since it is repeated for every heatsink, a constant of the test, it does not matter.

Calibration of the meter used to read the probe and no standard method of deteremining tightening torque of mounting hardware for heatsinks using nuts and screws and/or springs would be of much greater concern to the validity.

Exactly. :)
 
I'm not sure about that. Doesn't Intel report the maximum temp of the chip based on Tcase? If so, knowing the difference between the DTS temp and the Tcase temp would be very useful to help figure out a "safe" long-term temp for overclocking. Realizing that the difference between DTS temp and Tcase is likely to vary chip by chip, but at least you'd have a general idea. Right now, I don't know if anyone really knows how Tcase compares to DTS temp (and temp reported by programs like Coretemp).

Here's the link from Intel about maximum Tcase (near the bottom of the page):

http://www.intel.com/cd/channel/reseller/asmo-na/eng/299986.htm

er no, the internal DTS is used to provide feedback to the bios and other utilities implemented by the board manufacturers including EIST and Thermal Monitor 2. This is explained completely in the documents I referenced. Tcase is only available in a Lab. on a specially modified CPU.

The Tcase method is used to ensure the stock or aftermarket cooling remains within the Intel loadline for thermal dissipation. That information is for 3rd party resellers building "stock" configurations. In most cases enthusiasts are way "off the chart" due to overclocking and since we know, or can find out, the internal factory calibrated "The CPU is too hot, spin up the cooling NOW!" point where PROCHOT is asserted by the CPU, this provides an ideal benchmark when exceeding Intel's stock functional parameters. It is a much cleaner way IMO. There is nothing inherently wrong with measuring Tcase and using it to evaluate heatsink performance other than the fact that we, the readers, cannot compare the results to our systems directly. With DTS/coretemp values we can directly compare and I feel it is also more accurate or better to say "less prone to measurement errors".

Reading my first post I think I went a little crazy trying to make my point. There is nothing wrong with measuring Tcase, I worry about what I mentioned in that post as well as the ability to regulate room ambient to tolerances that would make readings accurate but that applies to all situations equally, I just want the internal DTS values as well as that is something we can compare to our own systems. I think they are more valid and yada yada yada but I am not doing the work and on reflection the [H] gang has not said they are not including DTS as well. I watercool anyway, so too much coffee, over reacted a bit, and nitpicking an engineering debate where there may not even be one. Kyle has seen my post/2cents worth so I am happy, his house, his call. /shrug all in good fun.
 
Please keep in mind that our focus here is to find out which heatsink does the best job and I think we have the tools to find that out in a fairly scientific fashion. :)
 
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