Core temp or CPU temp?

echn111 said:
My point was that, unlike you, the other poster backed up his assertion. I agreed with the other poster, and then further backed it up with another link and a pic.

As it is, you've lost whatever credibility you had.
Click to expand...

Wow...you must really be bothered. My proof, is in MY own experience, I have no lab data, just plain old good fashioned EXPERIENCE in 10+ years of computer building and overclocking.

If you just look around the forums a bit, you will see, truly, that the white paste and something like AS5 are in fact, REALLY CLOSE in actual REAL WORLD performance, given that the application, heatsink used, and clamp pressures are otherwise identical between the two thermal compounds.

And I don't need anyone to believe my "credibility"....I don't have an ego as big as yours to inflate apparently.
 
Offtopic:
Rainman, Why are you running your memory at 1.6 Ghz? Doesn't performence take a hit with such slow timmings??
 
TheRapture said:
Wow...you must really be bothered. My proof, is in MY own experience, I have no lab data, just plain old good fashioned EXPERIENCE in 10+ years of computer building and overclocking.

If you just look around the forums a bit, you will see, truly, that the white paste and something like AS5 are in fact, REALLY CLOSE in actual REAL WORLD performance, given that the application, heatsink used, and clamp pressures are otherwise identical between the two thermal compounds.

And I don't need anyone to believe my "credibility"....I don't have an ego as big as yours to inflate apparently.
Click to expand...

I see you are consistent in your approach: bullying, and filled with emotional personal attacks to compensate for your weak reasoning skills.

On the other hand... I don't buy that your reasoning skills are that bad. And you've really not backed up anything you've said. Your posts have been useless. Constant references to "ego" can be considered to be "fishing" as I've already said I'm pretty openminded and will change my views if someone has a better argument. And why would you bother posting if you're unable/unwilling to back up what you say?

Based on that I suppose you're simply having fun trolling. Fair play - everyone does it sometimes. However, I simply don't have the patience and this is the wrong board. Take this crap to genmay timewaster - you, my emotional friend, are a total waste of time, and are now ignored.

p.s. still slightly off topic, but wondering if anyone has experience with Coollaboratory Liquid Pro 50?
 
echn111 said:
p.s. still slightly off topic, but wondering if anyone has experience with Coollaboratory Liquid Pro 50?
Click to expand...

I have no experience with it, however I have heard that it drys, and becomes very adhesive much like super glue. Making it very difficult to remove the heatsink without damaging something.
But thats just what I have heard...

rainman said:
DDR3.

'Nuff said.
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Ok.
 
Bandwidth is right around 7.5gb/s write and 9.5gb/s read. Latency is 55.5ns. I use this machine for gaming and HD video editing.

It is freaking fast for HD video editing (non-linear, full resolution) -- see example here (112mb download -- right-click save as, take about 20 mins).
 
echn111 said:
I see you are consistent in your approach you, my emotional friend, are a total waste of time, and are now ignored.
Click to expand...


LOL....I must have hit a chord....you keep rebuking. You are also a total waste of time, but I don't ignore any user here on the forums. I like seeing your useless bullshit and drivel, it makes me smile. See? :D
 
rainman said:
Bill,

There are three temperature sensors on C2Ds and five sensors on C2Qs. The on-die DTS which gives each core temp and the "center of the processor" sensor that approximates the "Tcase."

The reason the third/fifth sensor lags the core sensors is because the IHS does not heat/cool as quickly as the cores.
Click to expand...

Linky please ? I find this nowhere in the Intel documentation and frankly, I do not belive it to be true. The DTS values are read from an MSR, how would one associate the third or fith sensor, if they exist, with an MSR/core ? How would one set the core affinity for a program to read this purported value not associated with a specific core ?

http://download.intel.com/design/processor/specupdt/25204621.pdf

13.5.5.2 Reading the Digital Sensor
Unlike traditional analog thermal devices, the output of the digital thermal sensor is a
temperature relative to the maximum supported operating temperature of the
processor. Tj(Max).
Temperature measurements returned by digital thermal sensors are always at or below
Tj(Max). Critical temperature conditions are detected using the “Critical Temperature
Status” bit. When this bit is set, the processor is operating at a critical temperature and
immediate shutdown of the system should occur. Once the “Critical Temperature Status”
bit is set, reliable operation is not guaranteed.
See Figure 13-9 for the layout of IA32_THERM_STATUS MSR. Bit fields include:
• Thermal Status (bit 0, RO) — This bit indicates whether the digital thermal sensor
high-temperature output signal (PROCHOT#) is currently active. Bit 0 = 1 indicates
the feature is active. This bit may not be written by software; it reflects the state of
the digital thermal sensor.
• Thermal Status Log (bit 1, R/WC0) — This is a sticky bit that indicates the history
of the thermal sensor high temperature output signal (PROCHOT#). Bit 1 = 1 if
PROCHOT# has been asserted since a previous RESET or the last time software
cleared the bit. Software may clear this bit by writing a zero.
• PROCHOT# or FORCEPR# Event (bit 2, RO) — Indicates whether PROCHOT# or
FORCEPR# is being asserted by another agent on the platform.
• PROCHOT# or FORCEPR# Log (bit 3, R/WC0) — Sticky bit that indicates
whether PROCHOT# or FORCEPR# has been asserted by another agent on the
platform since the last clearing of this bit or a reset. If bit 3 = 1, PROCHOT# or
FORCEPR# has been externally asserted. Software may clear this bit by writing a
zero. External PROCHOT# assertions are only acknowledged if the Bidirectional
Prochot feature is enabled.
• Critical Temperature Status (bit 4, RO) — Indicates whether the critical
temperature detector output signal is currently active. If bit 4 = 1, the critical
temperature detector output signal is currently active.
Fgure 13-9. IA32_THERM_STATUS Register
63 0
Reserved
15
Reading Valid
27 23 22 16 10 8 5 4 3 2 1
Resolution in Deg. Celsius
Digital Readout
Thermal Threshold #2 Log
Thermal Threshold #2 Status
Thermal Threshold #1 Log
Thermal Threshold #1 Status
Critical Temperature Log
32 31 9 7 6
Critical Temperature Status
PROCHOT# or FORCEPR# Log
PROCHOT# or FORCEPR# Event
Thermal Status Log
Thermal Status
Intel® 64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 28
Documentation Changes
• Critical Temperature Log (bit 5, R/WC0) — Sticky bit that indicates whether the
critical temperature detector output signal has been asserted since the last clearing
of this bit or reset. If bit 5 = 1, the output signal has been asserted. Software may
clear this bit by writing a zero.
• Thermal Threshold #1 Status (bit 6, RO) — Indicates whether the actual
temperature is currently higher than or equal to the value set in Thermal Threshold
#1. If bit 6 = 0, the actual temperature is lower. If bit 6 = 1, the actual temperature
is greater than or equal to TT#1.
• Thermal Threshold #1 Log (bit 7, R/WC0) — Sticky bit that indicates whether
the Thermal Threshold #1 has been reached since the last clearing of this bit or a
reset. If bit 7 = 1, the Threshold #1 has been reached. Software may clear this bit
by writing a zero.
• Thermal Threshold #2 Status (bit 8, RO) — Indicates whether actual
temperature is currently higher than or equal to the value set in Thermal Threshold
#2. If bit 8 = 0, the actual temperature is lower. If bit 8 = 1, the actual temperature
is greater than or equal to TT#2.
• Thermal Threshold #2 Log (bit 9, R/WC0) — Sticky bit that indicates whether
the Thermal Threshold #2 has been reached since the last clearing of this bit or a
reset. If bit 9 = 1, the Thermal Threshold #2 has been reached. Software may clear
this bit by writing a zero.
• Digital Readout (bits 22:16, RO) — Digital temperature reading in 1 degree
Celsius relative to the PROCHOT # activation temperature - 1 degrees C. See the
processor’s data sheet for details regarding PROCHOT # activation temperature.
• Resolution in Degrees Celsius (bits 30:27, RO) — Specifies the resolution (or
tolerance) of the digital thermal sensor. The value is in degrees Celsius. It is
recommended that new threshold values be offset from the current temperature by
at least the resolution + 1 in order to avoid hysteresis of interrupt generation.
• Reading Valid (bit 31, RO) — Indicates if the digital readout in bits 22:16 is valid. The
readout is valid if bit 31 = 1.
Changes to temperature can be detected using two thresholds (see Figure 13-10); one
is set above and the other below the current temperature. These thresholds have the
capability of generating interrupts using the core's local APIC which software must then
service. Note that the local APIC entries used by these thresholds are also used by the
Intel® Thermal Monitor; it is up to software to determine the source of a specific interrupt.
Figure 13-10. IA32_THERM_INTERRUPT Register
63 0
Reserved
15
Threshold #2 Interrupt Enable
24 23 22 16 14 8 5 4 3 2 1
Threshold #2 Value
Threshold #1 Interrupt Enable
Threshold #1 Value
Overheat Interrupt Enable
FORCPR# Interrupt Enable
PROCHOT# Interrupt Enable
Low Temp. Interrupt Enable
High Temp. Interrupt Enable
Intel® 64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 29
Documentation Changes
See Figure 13-10 for the layout of IA32_THERM_INTERRUPT MSR. Bit fields include:
• High-Temperature Interrupt Enable (bit 0, R/W) — This bit allows the BIOS to
enable the generation of an interrupt on the transition from low-temperature to a
high-temperature threshold. Bit 0 = 0 (default) disables interrupts; bit 0 = 1
enables interrupts.
• Low-Temperature Interrupt Enable (bit 1, R/W) — This bit allows the BIOS to
enable the generation of an interrupt on the transition from high-temperature to a
low-temperature. Bit 0 = 0 (default) disables interrupts; bit 0 = 1 enables
interrupts.
• PROCHOT# Interrupt Enable (bit 2, R/W) — When a catastrophic cooling failure
occurs, the processor will automatically shutdown. Bit 2 = 0 disables the feature;
bit 2 = 1 enables the feature.
• FORCPR# Interrupt Enable (bit 3, R/W) — When a source external to the
processor asserts PROCHOT#, the processor will throttle. Bit 3 = 0 disables the
feature; bit 3 = 1 enables the feature.
• Overheat Interrupt Enable (bit 4, R/W) — Enables the generation of an interrupt
when an overheat temperature [> PROCHOT # activation temperature] is reached.
Bit 4 = 0 disables the feature; bit 4 = 1 enables the feature.
• Threshold #1 Value (bits 14:8, R/W) — A temperature threshold, relative to
PROCHOT # activation temperature, used to generate an interrupt when the
Threshold #1 Interrupt Enable bit is set and the actual relative temperature reaches
or crosses this value.
• Threshold #1 Interrupt Enable (bit 15, R/W) — Enables the generation of an
interrupt when the actual temperature relative to PROCHOT # activation
temperature reaches the value specified in Threshold #1 value. Bit 15 = 0 disables
the feature; bit 15 = 1 enables the feature.
• Threshold #2 Value (bits 22:16, R/W) — A temperature threshold, relative to
PROCHOT # activation temperature, used to generate an interrupt when the
Threshold #2 Interrupt Enable bit is set and the actual relative temperature reaches
or crosses this value.
• Threshold #2 Interrupt Enable (bit 23, R/W) — Enables the generation of an
interrupt when the actual temperature relative to PROCHOT # activation
temperature reaches the value specified in Threshold #2 value. Bit 23 = 0 disables
the feature; bit 23 = 1 enables the feature.
 
This quide mentions "Tcase" and "Tjunction" http://www.tomshardware.com/forum/221745-29-core-temperature-guide however I cannot find an Intel doc backing it up.


I'll revise my statement, as it appears that there are documents out there that don't have the whole story. I read one Intel doc that stated there was a Tdiode in addition to the DTS system. However, I just read another (while searching for the first) that states "The processor does not have an on-die thermal diode."

Thank you Intel for muddying the waters by spending a few pages talking about the thermal diode only to bury in a note under a picture that there isn't one on this particular processor...:rolleyes:



Anyway, back to the regularly scheduled programming. Apparently the CPU temp number is some random
 
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