Confirmed: Haswell-E uses Soldered TIM

Although the thermal interface is a part of the problem I am more interested in if the 22nm process improved allowing for greater frequencies than IVB-E when overclocked.
 
Does this just apply to the $1,000 version or all of the Haswell-E's, including the 6 core $350 version?
 
Does this just apply to the $1,000 version or all of the Haswell-E's, including the 6 core $350 version?
The only one that has been confirmed is 5960x which is the 8-core beast.

So in my opinion these will be similar manfacturing processes so I would guess that the entire Haswell-E line will have this as well but that is just my guess.
 
It's interesting to me that the 8 core /16 threads is really a 12 core 24 threaded CPU with 4 cores disabled. Will they disable 1/2 the cores for the 6 core?
 
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Still have to wait until Skylake to finally get rid of the FIVR.
 
It's interesting to me that the 8 core /16 threads is really a 12 core 24 threaded CPU with 4 cores disabled. Will they disable 1/2 the cores for the 6 core?

You saw the 12 cores too.
 
Fucking niiiiiice, since I'll be grabbing a Haswell-E. Hopefully like some of you mentioned, this will apply to all Haswell-E CPUs, and not just the 5960X.
 
So much for the idea of "you only need a pea of thermal paste in the middle of the heat spreader" when you look at that thing. Cores edge to edge. I knew my method of spreading the paste with a gloved finger was the way to go.
 
Actually, pro's do the 5 point method. One small pea in the center and 4 smaller dots in the corners.This gives a consistent spread with better results,
 
It looks like he destroyed it in the delidding process.. You can see the chip pattern in the top half of the cpu.
 
Actually, pro's do the 5 point method. One small pea in the center and 4 smaller dots in the corners.This gives a consistent spread with better results,

Alternative is doing a cross. Thin lines from corner to corner. It spreads evenly and does not leave bubbles.
 
Alternative is doing a cross. Thin lines from corner to corner. It spreads evenly and does not leave bubbles.

And now we list all the different, better than the next methods of spreading paste. I go with a straight line right down the middle, not quite all the way to the edges. Rarely do I not cover everything and there is minimal overflow.
 
Just put a spot in the middle and use a credit card to make it into a thin flat layer.

Or use any of the above patterns, and then use a credit card to flatten and smooth it out into a thin layer.
 
I draw a portrait of Justin Beiber's face on the IHS, find it provides optimal heat transfer when that little dicks face is smushed. No Bubbles!
 
So much for the idea of "you only need a pea of thermal paste in the middle of the heat spreader" when you look at that thing. Cores edge to edge. I knew my method of spreading the paste with a gloved finger was the way to go.

Have you ever actually compared how much people use when they say they use a "pea size drop" of TIM? I can pretty much guarantee that if yu compared with an actual pea, it would be a lot less.

The "pea" method has not been very good advice since the mid-90's. You generally don't get good coverage.

What I do it a drop in the middle and then smaller drops nearer the corners. I then install the heatsink, squish the paste around, remove the heatsink and add a bit anywhere I am not seeing full coverage. This tends to allow me to get a nice thin layer and also not use too much.

Since the IHS is generally not really flat unless you lap it, the whole spread with a gloved finger is not necessarily going to get you good coverage either since some places will actually need more than other places.
 
I use about a 1/2 pea size in the center install the heatsink to spread it then take the heatsink off and use my finger (inside a plastic bag) to buff in the compound over the whole contact area on both surfaces.
 
I doubt these chips will be extreme overclockers unless on water. Perhaps you could overclock them by 500-600MHz?
 
Haswell-E Uses Soldered Thermal Interface Material

According to what we see in this picture at OCDrift, Intel has started using a strong epoxy between the die of the Core i7-5960X Haswell-E processor and the heat spreader. Thanks to [H] reader Arkanian for the heads up.
How is a strong epoxy = solder?
 
Humm after knowning this looks like I will be upgrading from my 3930k to the 5960X.... Time to turn my X79 over to a server and get the X99....
 
How is a strong epoxy = solder?

Looks like he just brute forced, as is says, the IHS off the pcb and broke the die in half. You can see the solder still under the die on the bottom of the IHS.
 
It's interesting to me that the 8 core /16 threads is really a 12 core 24 threaded CPU with 4 cores disabled. Will they disable 1/2 the cores for the 6 core?

From what I've read, there will be three core designs for the new socket-2011: 6 core, 12 core, and 16 core, mostly used for Xeon processors. The Haswell-E desktop chips will mostly use the 6 core design, with the 8 core version using the 12 core design with 4 cores disabled, using binned chips that did not pass the muster for Xeon level 8, 10, or 12 core chips.

The biggest difference I read about is that the 16 core design will also have a dual quad-channel memory controller (that is, two controllers that have four channels each) design like the old Westmere Xeon E7 chips, specifically for the Xeon E7-4XXXv3 and E7-8XXXv3 chips, and will address up to 8TB of DDR4 memory at 2133, with advanced ECC, chip disable, and memory mirroring, along with the other usual enterprise features. Those ought to make some pretty awesome VM hosts.
 
How is a strong epoxy = solder?

It does look like it's an epoxy rather than solder, The white stuff right below the die in the right hand side of the pic looks like overflow from when it was manufactured. It does not look like the real solder interface of the SB-E or IB-E chips. http://www.techpowerup.com/186209/intel-core-i7-4960x-de-lidded.html

I agree with you. Epoxy does not equal solder. I see no solder between the die and the IHS on this chip. It's bound to be inferior heat transfer compared to SB-E or IB-E.
 
now that explaims the rumors of Haswell-E being very poor overclockers: it is a native 12 core design. also soldered die using epoxy could resut in worst thermals than SB-E, IV-E not that any of those were " 5GHz on air" beasts to begin with.

On the other hand this means that we will have a 12-core unlocked chip sooner than expected:cool:
 
epoxy is not "soldering", the same way that Elmers' gluing two pieces of paper together is not "welding"... stupids.
 
now that explaims the rumors of Haswell-E being very poor overclockers: it is a native 12 core design. also soldered die using epoxy could resut in worst thermals than SB-E, IV-E not that any of those were " 5GHz on air" beasts to begin with.

On the other hand this means that we will have a 12-core unlocked chip sooner than expected:cool:

The 12 core design is similar to the IB-EX 12 core design, in that it has two ring busses joining the cores together. Overclocking could throw those ring busses out of sync, bringing the core to a halt while trying to have cross communication between the cores. So, yeah, likely the 8 core Haswell-E chip will likely be a very poor overclocker. Good conclusion.

The 6 core design, though, uses just one ring bus like the IV-E chip. So that overclocking should be on-par with IB-E, which uses the same manufacturing technique. We should be able to get 4.4-4.6GHz out of them.
 
epoxy is not "soldering", the same way that Elmers' gluing two pieces of paper together is not "welding"... stupids.

Easy with the stupids.

But this is true. However, it's conflicting. They say "epoxy" but the picture looks like solder in some areas. It's possible it could be some epoxy that when mixed and heated, it turns into a solder (which is the joining of two metals with heat and a filler metal). Kinda like solder paste, but stronger.
 
Until Intel officially states that it's indium solder, it's just thermal paste, one step up from toothpaste.
 
Easy with the stupids.

But this is true. However, it's conflicting. They say "epoxy" but the picture looks like solder in some areas. It's possible it could be some epoxy that when mixed and heated, it turns into a solder (which is the joining of two metals with heat and a filler metal). Kinda like solder paste, but stronger.

people don't go easy with "stupid" here.
gwpv.png

smarter people have destroyed their dies trying to delid what is supposed to not be delidded:
dead 2500k:
8995764530_e1fe6c4970_o.png


dead 4960x:
03.JPG


epoxy or metal, i don't see many " smart persons" joining the delidded club;)
 
The TIM issues have only been on the 4 core models never a problem on SB-E or IVY-E so I was expecting it to be the same for haswell E and it is.

SB-E was before the TIM fiasco that was Ivy. SB and SB-E both used solder to connect the heat spreader to the die. All Ivy and Haswell CPUs use crap TIM to do the same, with negative consequences. Only IVY-E uses solder.

Also, epoxy is not metal and I expect far worse thermal conductivity than proper fluxless solder.
 
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this is like true solder looks like after delidding. let's hope that the f epoxy shit is a ES only solution, and final production silicon uses the old solution.
227c.jpg
 
If it helps, all AMD Phenoms ans FX are soldered.

I do not know if that translates to what Intel does. I mean FX is 32nm SOI. FX has a significantly less processing power in each core and it requires around 5 GHz to match an 3.5 GHz i7. Intel is using 22nm bulk silicon.
 
just watched a newegg video on this and the clock speeds arent very eye catching

3ghz stock and 3.3ghz turbo? ouch on single core performance (95% of apps still single core).
 
just watched a newegg video on this and the clock speeds arent very eye catching

3ghz stock and 3.3ghz turbo? ouch on single core performance (95% of apps still single core).

While I understand why you are concerned, you have to understand that if Intel wants to hit a certain TDP, they have 2 options on a given node. They can either reduce the core count, or reduce the clock speed of said cores (assuming we keep cache sizes/iGPU shader counts etc consistent I am referring just to the CPU side)..Since we all want an Octacore in non Xeon trim, then Intel has to keep the clockspeed down to hit a certain TDP..

Now we all know even the worst silicon has headroom over the "stock" clocks, it just depends on how much voltage you are willing to run through it. Intel reserves clock speed so that they can offer some "value" in the form a refresh (see the 2600K to 2700K, 4770K to 4790K etc)..

Lastly, since they are K SKUs, it is quite easy to go into the BIOS and adjust 1 setting to increase the clockspeed via the multiplier, even if you want to keep the stock Vcore..You will most likely be able to squeeze out at least a few hundred Mhz more unless these chips are complete dogs..

I was 99% certain I was going to move to X99 and get the 8 core flagship part (never owned an "EE" part and while I don't want to drop 1K that is the only way to play these days) when they were announced, the closer we get to launch the more I am worried. If the 8 core parts do come in @ 3Ghz stock, and we assume the best parts are able to reach a 50% OC (which is a lot), then we are looking at ~4.5Ghz for the platinum center wafer cut chips..

While I have the cooling to take said CPU to that level, finding one is going to be the challenge..And then I have to look at losing 200~300Mhz of single thread performance (vs my sig rig) since the IPC jump of Haswell isn't much over Ivy..I think the 8 core parts are going to reintroduce the old "batch hunting" we used to do when trying to source the best OC'ing parts, since we know the 8 core SKUs are being harvested from 12 core dies that don't make the cut..
 
My 4770K got like 61 degrees playing Rift

While my 8350 FX never got that hot and it runs at a higher voltage


Using a simple 212 EVO to cool it

Yea well 61C for an Intel chip is fine...61C for an AMD chip is on the verge of thermal shutdown for their 125W and higher chips.
 
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