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i ran everything stock ootb
both software and hardware
would be crazy to get a denial
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RTX 5090 FE Molten 12VHPWR
- Thread starter erek
- Start date
both software and hardware
would be crazy to get a denial
I agree, yet several companies (such as Samsung) have been denying replacements and issuing a refund for the original purchase price since the profit from selling the product instead of replacing it is so much higher. Scummy behavior, and I'm just a cynic at this point. FWIW, I hope that doesn't happen to you since 5090s are now firmly above decent used car prices.
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Damn, RIP...that sucks man. Looks like you torched all the pins, but at least I didnt start on fire and cause even worse issues. Hopefully you can get it all fixed or replaced, and not get screwed on the RMA process.
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That's the idea, yes. And absolutely, there will be "wasted" headroom in that you can't balance power perfectly, but on the flipside, that "wasted" headroom can easily be re-
interpreted as "safety" headroom, which this connector badly needs.
Up until the 3xxx series (and AMD still has this), VRMs have been fed by sets of pins that have enough safety margin to handle 1 or 2 marginal pins. Even the 3xxx series split 12vhpwr into 3 sets of 2 pins each. You just won't be able to max out the connector but getting 90% of each pin should be doable without expensive load balancing and tying everything to a single bus. Need more than 540 watts? Slap a second connector on there.
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Yeah, im still not seeing it. If i have time I'll run a spice simulation at some point. Just need to figure out how to model a constant power load that doesn't care what the voltage input is (VRM).
Notes for me in case I try this: ltspice bi component. I=P_load/V(V_in). good starting point. P_load = 100watts. R_contact=0.01ohm. Use 12V voltage source. bi component straight to ground.
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i’m glad my house didn’t burn down
so right now i’m kinda relieved to be done with it
can relax a little now that the connector burned out
i’m running igpu on my 9800x3d to get by
Well you have a solid PSU so doubt it would cause a fire but I noticed your picture is using the adapter. I heard the adapter has more issues for melting so maybe look into a new PSU with some kind of protection built in. Not sure how old your PSU is but I wouldn't trust the adapter again.
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I concur, use the PSU's dedicated 12vhpw cable straight from the PSU.
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If you have a marginal connection where the VRM is pulling more amps than the pin can handle, the card should throttle or shut down before it damages the connector. This would be simple enough to do- if the voltage before the VRM drops below a preset value, throttle or shut down the card. Per pin voltage monitoring is much cheaper and easier to implement than fancy load balancing to a single bus.
d3athf1sh
[H]ard|Gawd
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sucks man. sad to hear you got hit with it. but i'm still in the camp to believe everyone using those connectors are going to experience it eventually. well ones with cards with high power draw. the pins of the connector are just way to small. i don't know if you ever saw my post in the power supply section, but i was looking at the MSI power supply i had just bought and there was no UL certification anywhere on the box. and here i thought it was a requirement for all electrical devices sold in the US? but i know that connector setup would have never made it out of the lab.
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There's a fuse after the connector, but nothing before that. The only thing I can think of would be to put a fuse directly in the cable itself.
d3athf1sh
[H]ard|Gawd
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no it's just as bad. look at the picture i posted a while back. the pins of the 12v-2x6 are HALF THE SIZE of every other pin on the power supply. you know, the ones we've been using for years and never had a problem with?
The only reason the adapter would be worse than a native cable, other than build quality, is the additional torque imparted on the connector. I've seen plenty of native cables melted on both ends, and only one adapter that had a melted 8 pin side... because the owner of the 5070 used a single 8 pin cable from the PSU and used a splitter adapter.
It's also more points of resistance and thus more imbalance potential. It's one of the reasons I wanted a PSU with monitoring, rather than a Wireview. Less connections, crimp points, etc. If anyone wants one MSI makes them the MPG Ai1300TS/1600TS. 1300/1600w Titanium(ish) PSU with built in per pin monitoring, hardware alarm and shutdown. Going to cost more than a Wireview of course, but it is in the PSU itself.
Corsair also makes a cable with a bimetallic trip sensor in it, so cable heats up, no matter what the reason, it'll trip. Advantage is price, it's heat driven, and there really is no failure more, a bimetallic switch is basically always going to work. Disadvantage is connector is pretty hot by the time it actually trips. Still probably save the cable and almost certainly save the GPU though.
If I were me, I wouldn't use adapters, only a cable that goes straight from the PSU to the GPU (a cable that itself changes on each end is fine, like the 2x8-pin to 1x12vhpwr that Seasonic uses for their older PSUs). I also would undervolt your 5090, as in my experience it reduces power draw and does not reduce performance by any meaningful amount.
8 pin cables have a much higher safety margin than the 16 pin cable, so that doesn't matter nearly as much - and it's likely why we don't see the 8 pin cables melting all the time like we see both ends of the 16 pin cables often melting. Actually Hardcore Overclocking did a video that touched on it awhile back. I'll see if I can find it.
View: https://youtu.be/kb5YzMoVQyw
It does in that when the resistance changes, it changes the current balance. So while it isn't a problem for the 8-pin cables, at all, it is for the 12vhpwr. The 8-pin ports are actually run exceedingly under spec. They can run at 300w, not the 150w that the GPU spec used. In fact you'd see companies like Seasonic have 1x8-pin on the PSU side go to 2x8-pin for the GPU. So when you are doing a 4x connector for 600w, the pins there are not at all strained. The issue is if somewhere in there, you get resistance imbalance. If one of those paths has a much higher, or lower, resistance than the others then that'll lead to a current imbalance and remember for what we are talking about here half an ohm is sizable. The loop resistance of a cable that long is miniscule, so if something causes a rise in it, that can cause an imbalance. Current doesn't take the lowest resistance path, it takes all paths equally in porportion to their resistance.
I'm not saying an adapter will for sure cause that, many don't. I'm saying it is another point that an imbalance can happen. They can happen anywhere there's a connection, be it a plug or a solder joint, if there's an issue so it is good to minimize those.
This. I also use a MSI AI power supply that helps with any issues that may pop up. The Corsair cable is something else I have used on a different power supply for the same reason.
Funny enough, I had current imbalance on my stock 5090 adapter. It wasn't caused by the 8 pin connectors as reseating the 8 pin cables as well as the 16 pin connector did nothing to the pin imbalance (pin 2 6A or under, pin 6 >10.5A when it's a 9.1A max spec). I found this out by using a Thermal Grizzly WireView Pro II.
I replaced the adapter cable and the pin imbalance is now gone. So, it's extremely likely that the 16 pin connector was the problem as it has been for so many people. My view remains that the 16 pin cable is deliberate, planned obsolescence.
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Great, a conspiracy theorist. What's next, Project 2025, the Epstein Files, and AI being pushed by Billionaire tech oligarchs?
/s
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Oh no. You just sent up the nVidia Defense Team Bat Signal. Someone will be along shortly to tell you why nVidia did nothing wrong and you are the problem and clearly an AMD fanboy.
Anyways, I just ordered a TG WireView Pro for my RTX 5070ti just in case.
It’s far more likely that an intern designed it because all the good engineers were moved over to working on enterprise gear. And then it was signed off by an equally incompetent manager because all the good ones were moved over to enterprise. And nvidia hates admitting fault when it comes to anything it does wrong. So here we are.
To be fair, Nvidia is only one of the companies that signed off on the 12VHPWR and 12V2X6 connector. AMD and Intel, among many others, signed off on those PCI-SIG standards.
mullet
2[H]4U
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Agreed, per pin current monitoring is a different story to load balancing.
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Ok, so to the suggestion to simply not use a common bus on the GPU to get good load balancing, my response is thus: DO NOT DO THIS. If anyone thinks I modeled anything wrong below, speak up.
Ok, here is the setup. Below is a common bus setup. The 12V on the left is the PSU. The 4 resistors in the middle is an example of a connector with 4 pins. Each pin will have some contact resistance, for my example I used 10mOhms. On the right we have 4 power loads. Each will use 100 watts of power, regardless of the input voltage (ideal VRM). (The assumption here is that the GPU is using a total of 400 watts constant for some steady state load)
Ok, now same simulation, but I changed R1 to be 100mOhms (10x resistance) to simulate a poor contact. You can see the current in R1 dropped, and R2, R3, and R4 now need to pick up the slack.
Ok, now let's repeat the same experiment, but disconnect the common bus on the GPU side. First, ideal case. all pins are good.
It looks the same as the common bus ideal case, which is what we expected. Now let's set R1 to be 100mOhms to simulate a bad contact.
Wowza current in R1 shot up like crazy. R2, R3, R4 havent changed.
Lets compile the data in excel to see some conclusoins.
On the left is the 4 experiements, with 1,2,3,4 representing the 4 pins and VRMs. R is resistance, V12P0 is the input voltage into that VRM. I_B is the current into the VRM, I_R is the current into the contact resistance. P_B is the power used by the VRM (should always be 100watts, this is just a sanity check). P_R is the power dissappated by the contact resistance. I have totals for the VRM power and contact resistance power in each test.
common bus, ideals pins: 4.81 watts total disappated by the pins. baseline
common bus, bad pin R1. Pins 2,3,4 each have to disppate additional .47 watts. Total pin power disipation has gone up to 3.6 watts from 2.8 watts. Alright, lets look at separate bus.
separate bus, ideals pins. Same as common bus ideal situation. Good, this is expected.
separate bus, bad pin R1. Pin 1 current has shot up to 110 amps. The pin is now dissipating 1.2 kW. The other pins haven't changed. Obviously not great. This is assuming an idea VRM and ideal 12V PSU. In real life something would shutdown or blowup before you hit 1.2kw on a single pin.
Ok, here is the setup. Below is a common bus setup. The 12V on the left is the PSU. The 4 resistors in the middle is an example of a connector with 4 pins. Each pin will have some contact resistance, for my example I used 10mOhms. On the right we have 4 power loads. Each will use 100 watts of power, regardless of the input voltage (ideal VRM). (The assumption here is that the GPU is using a total of 400 watts constant for some steady state load)
Ok, now same simulation, but I changed R1 to be 100mOhms (10x resistance) to simulate a poor contact. You can see the current in R1 dropped, and R2, R3, and R4 now need to pick up the slack.
Ok, now let's repeat the same experiment, but disconnect the common bus on the GPU side. First, ideal case. all pins are good.
It looks the same as the common bus ideal case, which is what we expected. Now let's set R1 to be 100mOhms to simulate a bad contact.
Wowza current in R1 shot up like crazy. R2, R3, R4 havent changed.
Lets compile the data in excel to see some conclusoins.
On the left is the 4 experiements, with 1,2,3,4 representing the 4 pins and VRMs. R is resistance, V12P0 is the input voltage into that VRM. I_B is the current into the VRM, I_R is the current into the contact resistance. P_B is the power used by the VRM (should always be 100watts, this is just a sanity check). P_R is the power dissappated by the contact resistance. I have totals for the VRM power and contact resistance power in each test.
common bus, ideals pins: 4.81 watts total disappated by the pins. baseline
common bus, bad pin R1. Pins 2,3,4 each have to disppate additional .47 watts. Total pin power disipation has gone up to 3.6 watts from 2.8 watts. Alright, lets look at separate bus.
separate bus, ideals pins. Same as common bus ideal situation. Good, this is expected.
separate bus, bad pin R1. Pin 1 current has shot up to 110 amps. The pin is now dissipating 1.2 kW. The other pins haven't changed. Obviously not great. This is assuming an idea VRM and ideal 12V PSU. In real life something would shutdown or blowup before you hit 1.2kw on a single pin.
mullet
2[H]4U
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It’s clear to me (and not just to me) that this standard was designed with planned obsolescence in mind.
But that’s clear to Steve, too. Just as it’s clear to him that using a cable that’s frequently plugged in and unplugged causes the thin pins on the cable to wear out incredibly fast (there are comments that he’s using a very cheap cable), he flipped the cable over and connected it to the PSU because he didn’t want to damage the WireView and/or the card.
Basically, whether he did it on purpose to reach this point of melting or just caused it to happen doesn’t really matter. He simply wanted to show how a degraded connector melts.
The only workaround for this problem is to replace the cable every so often, as soon as it starts to overheat. And look, he knows this very well, but his job is to inform the public about such “problems”—clickbait.
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Only if you're a reviewer unplugging and replugging it 500,000 times, sure. If you're a normal user you don't need to worry about that.
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You're missing the point and also missing how these things work in reality.
A combined bus hides marginal pins, slowly overloading the good ones until you have a burning connector.
The VRMs have a limit on how much current they can supply, so your separate bad pin scenario will never happen. What will happen is the voltage between the connector and VRMs will slowly drop until the VRMs become incapable of providing the correct voltage at the requested current, which leads to artifacting and/or shutdowns. A voltage monitor (much simpler and cheaper than a current monitor) can catch the voltage drop and throttle or shut down the card below predetermined thresholds.
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I don't understand. Redo my simulation with R1 at somewhere between 10mohms and 100mohms. Now the combined bus works comfortably, and the separated bus slowly degrades and fails, just like you feared. How is this better.
Again I dont understand. VRMs typically try to maintain voltage on the output side. They will sink as much current as they need to maintain that (to a limit). If you have some beefy VRMs on poor contacting inputs, they can easily burn out the connector.
Yes, voltage will drop, as seen in the simulation. Current will also increase, again, look at the simulation. You are optimistic that conclusion of this is just artifacts and shutdowns. The connector can burn from this if its resistance is too high.
We already agree here. Except that my argument is that after you have any shunts required to monitor the individual voltages, I still dont understand why you wouldn't combine all of the power nets into a single large pour. Now you can monitor individual pins, and not have the downsides of keeping the power nets separate.
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I thought about it some more. Let me rephrase what I think your argument is. Trying to get good power delivery out of pins that have poor contact is doomed to failure. Common bus, or separated, doesn't matter. However, with separated bus, its easier to monitor each voltage, and immediately alert the user/shutdown the system. if this is your general argument then I could agree with that.
I think my problem is often hear this as a solution for load balancing, and it seems like a very bad solution for load balancing.
Seems just as easy to monitor per-pin though, which we have PSUs (and GPUs) that can do.
That is precisely the engineering argument I've seen against it. The way loads work in modern GPUs are too complex to be something that a clear "just split them across pins" design is a good one. Particularly when the pins are run so hard at max load. That's more something you can do when you are running things way under what they can actually handle.
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What you're not understanding is how the power delivery system works. It's not constant power like you're assuming.
Source: https://eureka.patsnap.com/article/multi-phase-vrms-powering-modern-cpus-and-gpus
In any case, a VRM can only step down voltage; it cannot increase voltage as your separate pin scenario implies (most CPUs and GPUs run above the 0.9 volts that your spreadsheet calculates).
Voltage monitoring does not require a shunt. It's directly monitored by any standard analog chip. You avoid dumping everything into a common bus because dumping everything on a common bus on both sides of the connector masks a problematic connection until the damage has been done. The goal is to catch a problem before damage occurs, not after.
By definition, per pin monitoring splits everything onto separate buses. If the PSU is doing this, then it's okay to common bus things on the GPU side. I also highly doubt it's as difficult to split the phases as you are making it out to be. Certainly nVidia has more than enough engineering expertise to make it happen if they really wanted to.
It's more expensive than you make it out to be, if done correctly. It isn't just "hook some VRMs to each pin."
Doing per-pin monitoring doesn't really mean separate busses, just a shunt resistor on each pin that go to an amplifier, a TI INA4180A3 in this case, that then goes to a digitizer. It measures the voltage differential across the resistor which allows the inference of current.
I mean yes, technically things are "separated" when they hit the wires and flow down them, but they are all tied to the same 12v output on the PSU. There are not 6 separated, current regulated, output devices. It is the same bigass 12v output that every 12v pin in there is connected to. Just with monitoring on it.
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You only need to design it once for each GPU. And really, it only matters for the high power GPUs- the lower power ones have enough safety margin that splitting it absolutely evenly isn't a big concern. Or are you telling me nVidia doesn't have enough engineering resources to spare for their $5000 GPUs?
As for the splitting of power, you can say the same thing with fuses and circuit breakers. Point is, there is protection for each pin with per-pin monitoring and it doesn't matter whether that's PSU side or GPU side.
Splitting the VRMs comes with engineering and design costs but results in lower manufacturing costs because you only need simple voltage monitors. Downside is you might not be able to draw power at the limit. Monitoring current has a higher manufacturing cost because you need more complex hardware to measure current, but theoretically you can run at the limit with the caveat every pin is making identical contact. nVidia chose to cheap out and do none of the above.
M76
[H]F Junkie
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OR how bout just making a cable beefy enough to handle the power it is intended for? Like we had with PCIEX? I'd rather sleep well than have a chic connector.
The root of the problem lies with the connector (connector/pin size), though, not just the cable - that's more of a knock-on effect since the connector pins are so small. If that's what you meant, cool - please disregard. But simply increasing the wire gauge won't fix the connector melting issue - unless you also increase the connector and pin size in order to get the physical connections mated better as with the 8 pin connectors (less resistance at the pins with a suboptimal mating connection).