TSMC to Start 5nm Production with Full EUV in April 2019

cageymaru

cageymaru

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TSMC has taped out its first chip with limited use of extreme ultraviolet lithography (EUV) and will start risk production on a 5nm node with full EUV in April 2019. "TSMC said that N5 will deliver 14.7% to 17.7% speed gains and 1.8 to 1.86 area shrinks based on tests with Arm A72 cores. The N7+ node can deliver 6% to 12% less power and 20% better density; however, TSMC did not mention speed gains." Chip design tools for N5 aren't expected to be ready until November and some designs such as PCIe Gen 4 and USB 3.1 will have to wait until June.

TSMC is offering two version of a planar 22-nm process that can compete with fully depleted silicon-on-insular processes from Globalfoundries and Samsung. "Some IP will not be available for the 22-nm nodes until June, including PCIe Gen 4, DDR4, LPDDR4, HDMI 2.1, and USB 3.1 blocks." TSMC is working with Cloud providers like Amazon Web Services and Microsoft to offer back-end chip design based in the cloud. TSMC used the cloud tools to design 5nm SRAM and Synopsys was successful with a tape out of a PCIe Gen 5 PHY block in TSMC's 7-nm node.

Transistor density at N7 is 16.8x greater than at the foundry's 40-nm node, said TSMC. Unfortunately, costs are increasing, too. One source pegged total costs for an N5 design including labor and licensing at $200 to $250 million, up from $150 million for a 7-nm chip today, limiting pursuit of Moore's Law to the well-heeled.

"We haven't tested all the possible combinations, but given that our PDKs are certified, we're confident in the service," said Suk Lee, a senior director of design infrastructure marketing at TSMC, noting that executives agreed to create the service just six months ago. "We did our N5 SRAM development in the cloud, and that speaks to how comfortable we are."
 
"TSMC said that N5 will deliver 14.7% to 17.7% speed gains and 1.8 to 1.86 area shrinks based on tests with Arm A72 cores."
Compared to ...
 
When does tech go sub nano-meter, I wonder?

Or do we need to make the jump to optical transistors? Or some other new tech?
 
Elf_Boy said:
Hasn't the limit been hit multiple times?
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Up until the near future, our limits still lie with the lithography. It's our tools limiting how small we can make features.

Once we start talking <5nm, now we're approaching limits incurred by the size of atoms. The Si atom is something like .2 nm, for example, with most of the metals used being even larger. You'll need several atoms for a simple feature, such as a transistor. Then there is the issue of connecting the chip to a package, which is already an engineering marvel unto itself.

It's like Legos. As you go down in the size of a model, it's structure becomes necessarily more simple until you just have a couple bricks stuck together. The question is how few bricks can you get away with and still have something fun/interesting/useful.
 
Full Otto said:
Up until the near future, our limits still lie with the lithography. It's our tools limiting how small we can make features.

Once we start talking <5nm, now we're approaching limits incurred by the size of atoms. The Si atom is something like .2 nm, for example, with most of the metals used being even larger. You'll need several atoms for a simple feature, such as a transistor. Then there is the issue of connecting the chip to a package, which is already an engineering marvel unto itself.

It's like Legos. As you go down in the size of a model, it's structure becomes necessarily more simple until you just have a couple bricks stuck together. The question is how few bricks can you get away with and still have something fun/interesting/useful.
Click to expand...


Right - I get this and know how this works.

I am not willing to bet for or against this being the end of the line for shrinking silicon circuits.

Sooner or later someone is going to have a bright idea - one of which will eventually work out.
 
intel has access to EUV as well, but I'm not sure where they are at with it... But if TMSC is even close to being ready by mid next year that's very bad news for intel's current roadmaps.
 
Elf_Boy said:
When does tech go sub nano-meter, I wonder?

Or do we need to make the jump to optical transistors? Or some other new tech?
Click to expand...

The sizes at this point are more marketing than anything and don't represent their true size.
 
Something feels amiss here. They mention everything except cpu. I also want to see their yields before they brag that they reached that node first.
 
Elf_Boy said:
Hasn't the limit been hit multiple times?
Click to expand...

Well, I suppose manipulating single atoms is the physical limit. That's been done in a lab setting but it's hard to say what the practical limit for commercial products will be.

We have a ways to go to catch up with biology. I think we're at a point where we need 'new tech' besides smaller transistors to make serious progress there.
 
So this would probably lock the new consoles in at 7nm, since they couldn't really be working on any nodes past that in the design standpoint at this time. 1080ti performance would probably be the bare acceptable minimum they could launch these consoles at to get a playable 4k experience. This would be an improvement on the vega64 architecture from AMD to achieve something of that nature. I don't see how this is financially possible in a full console at 7nm for under $500 (let alone almost $1000) considering the broken pricing in the gpu market. Releasing a new console for next Christmas sounds like an awful idea performance wise due to the bloated costs associated with actual 4k gaming, and not just 1080 bland gaming up-scaled to 4k that we use today as the standard.
 
oldmanbal said:
So this would probably lock the new consoles in at 7nm, since they couldn't really be working on any nodes past that in the design standpoint at this time. 1080ti performance would probably be the bare acceptable minimum they could launch these consoles at to get a playable 4k experience. This would be an improvement on the vega64 architecture from AMD to achieve something of that nature. I don't see how this is financially possible in a full console at 7nm for under $500 (let alone almost $1000) considering the broken pricing in the gpu market. Releasing a new console for next Christmas sounds like an awful idea performance wise due to the bloated costs associated with actual 4k gaming, and not just 1080 bland gaming up-scaled to 4k that we use today as the standard.
Click to expand...

G\rand Tourismo is native 4K, not scaled last I read.
 
I got a tour of an experimental lab working toward 100nm litho back in the late 1990s and it was really impressive. This is getting nuts.
 
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