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TSMC pushing back 2nm again

Lakados

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https://www.extremetech.com/computing/report-tsmc-could-push-2nm-node-back-to-2026

TLDR;
Manufacturing problems at a key facility needed for TSMCs 2nm plans means it is unlikely to be completed and online for 2025 and 2026 is more likely for its completed construction date.

Slowdown in demand as Samsung’s 3nm process is online and rolling is hampering TSMC’s ability to throw money at all the construction projects they have on the go to being them back on schedule.

If TSMC does delay 2nm, there is a very real chance Intel will succeed in leapfrogging them by 2025.
 
If TSMC does delay 2nm, there is a very real chance Intel will succeed in leapfrogging them by 2025.
tumblr_9d4b3abb8d8eafeefa454bd4b21797fb_23a2fe85_500.gif
 
Yeah, Intel, who certainly hasn't had significant issues and delays with just about every node reduction in the last decade.

It's possible, but I would never put money on it.
Well they did just finish showing off the successful results of their 2nm and 1.8nm nodes. And those results were good enough that MediaTek has switched from TSMC to Intel for their upcoming parts.
 
Nothing against TSMC, they are world class. And Intel was considered world calss before their 10nm woes. These types of delays are to be expected.

Smaller and smaller process nodes at this point are really hard. Like pushing the boundaries of known subatomic particle physics hard. We are finally running head first into some pretty hard limits of what is possible to do with silicon.

Even the best are occasionally going to run into trouble.

I think the future is going to wind up implying architecture designs optimized for lower and lower voltages and thus higher and higher perf per watt at the cost of absolute performance, and then have to make up for it through larger chip designs instead of pumping up the performance of a small central die.

This will get more expensive.
 
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Chips won't be getting cheaper

Yep.

You know, it's been almost like a unwritten rule, that with every generation tech gets smaller, more powerful, more power efficient and cheaper. You know, how the computer that was in the moon lander in 1969 cost millions and was orders of magnitude less powerful than even a modern low end smart watch which can be had for like $20.

We always knew this couldn't go on forever, and I think we've gotten to that point now.

I still think Nvidia is milking it for everything it is worth in order to raise prices, but at the same time we should definitely not expect to continue to see the price per computer cycle continue to trend steeply downward like it has for the almost 80 year existence of the electronic digital computer. At some point the cost involved to get further gains in any one chip is going to make them more expensive over time, not less. And we may already be there. Or at least very close.
 
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Moore's Law is dead... progress has slowed. There is still progress but the key point was a doubling of performance every 2 years, usually by shrinking the transistors which allowed them to speed up. But the speed has basically tapped out for the last ~12 years at 4-6Ghz. Performance has been boosted instead by increasing density and parallel computing designs.

How small can they go? The size that matters might instead be the elements used in the transistor gates, and Gallium Arsenide is a compound of Gallium and Arsenic.

The atomic radius of silicon is 0.132nm
Germanium is 0.137nm
Gallium Arsenide is a compound: Gallium's atomic radius is 0.135nm, Arsenic's is 0.119nm. The compound looks to be 5 atoms across (I'm not a chemist), and I think there is some overlap in the atomic radii, but it appears that a 'unit' of the compound is about .54nm.

If that is accurate, how many atoms of each compound are needed to make a working and stable transistor? A 5nm square is 37 to 38 atoms of silicon along each edge. Once they get down to about 10 atoms, it's going to probably be the max limit in chip density. Something like 1.2nm. The naming conventions the foundries use don't reflect the actual size, but we are probably 2 or 3 density doublings (old moore's law steps, where density doubled), from the smallest workable size.
Multiple level chip design is already a thing and will probably be one way to grow the density.
 
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