TSMC 3N struggling

[Lakados]

https://9to5mac.com/2023/04/26/tsmc...j6hoAVcpxomAXSvngdnZ0zYSpWT5JQiFrNped9bEM3dJo
https://www.eetimes.com/tsmcs-3-nm-push-faces-tool-struggles/

TLDR;
Failure rates on 3N are very high to the point where Apple alone is able to demand more from it than TSMC can provide
TSMC has had to start charging based on the number of chips that are usable from a wafer, not for the wafers themselves.
Yields are looking to be around 55% and going up quarterly, but that means at the current rate we are looking at close to two more years before the process is properly commercially viable.
TSMC is waiting on their ASML 3800E units, which have been "AI" optimized with their partnership with Nvidia and they expect those units to solve many of the problems but they aren't scheduled to come online until 2024.

 

[david123]

Not a surprise. Technology is approaching limit. Probably we will see more of this kind of struggle towards 2nm, 1nm...

 

[LukeTbk]

The report to analyst say at the same time that is normal and in line with the usual of a new node life:
Although a 55% yield sounds very low, the report says that this is typical at a time when TSMC is still perfecting mass production of a new process.

That said they would obviously downplay it if that was an extraordinary issue, but if the 5% a quarter would be true, end of 2023 and you get in the 70%+ zone already.

The number do sound low for small 100-110m smarthphone chips.

 

[Zarathustra[H]]

https://9to5mac.com/2023/04/26/tsmc...j6hoAVcpxomAXSvngdnZ0zYSpWT5JQiFrNped9bEM3dJo
https://www.eetimes.com/tsmcs-3-nm-push-faces-tool-struggles/

TLDR;
Failure rates on 3N are very high to the point where Apple alone is able to demand more from it than TSMC can provide
TSMC has had to start charging based on the number of chips that are usable from a wafer, not for the wafers themselves.
Yields are looking to be around 55% and going up quarterly, but that means at the current rate we are looking at close to two more years before the process is properly commercially viable.
TSMC is waiting on their ASML 3800E units, which have been "AI" optimized with their partnership with Nvidia and they expect those units to solve many of the problems but they aren't scheduled to come online until 2024.

Yep. This is only going to get worse and worse with each die shrink from here on out.

Actually 32nm back in 2010 was really the last process node that didn't have significantly greater difficulties than the node before it, and ever since it just keeps getting worse with every node.

We've been pushing the limits of subatomic particle physics with every node since then. Just like with Intel's 10nm process we should expect problems like these on a regular basis until one day it just won't be possible to go any further with silicon and we will need to find an alternative material or computing capabilities will seriously stagnate.

There are many bad market powers at play driving high chip pricing, but the limits of process node shrinks are the one real justification for higher chip costs over time. This plays out both in increasingly science fiction sounding processes needed for the die lithography, which are expensive, lower yields which are expensive AND a trend towards larger lower frequency chip designs as this can be somewhat of a workaround to gain higher perf per watt, and larger chips wind up being more expensive....

I suspect as we go along we will get to a point where we can't go any smaller, and the very the smallest nodes will never get their yields up, and will be super expensive due to the need to pay for a full wafer to only yield a handful of functioning chips.

You don't have to get to the point where size of the atom upsets thoughts though. Even at 7nm we start seeing "quantum tunneling" by electrons between conductors, making sub 7nm processes very challenging.

It is tricky to predict what will be possible in the future. Many way more knowledgeable and smarter than me have tried and failed in the past, but it is looking like much below 1nm will be a serious challenge that may not be possible.

GaN may help a little, but as of right now it has the problem of its transistors being "normally on" when no power is provided whereas most computing logic needs both "normally on" and "normally off" transistors. And even if we get to the point where we can make good transistors in GaN its only a matter of time until we reach the subatomic limits there too.

Something huge and transformational will need to be discovered rather soon if we are not going to see a complete stagnation in computing performance.

 

[Lakados]

Yep. This is only going to get worse and worse with each die shrink from here on out.

Actually 32nm back in 2010 was really the last process node that didn't have significantly greater difficulties than the node before it, and ever since it just keeps getting worse with every node.

We've been pushing the limits of subatomic particle physics with every node since then. Just like with Intel's 10nm process we should expect problems like these on a regular basis until one day it just won't be possible to go any further with silicon and we will need to find an alternative material or computing capabilities will seriously stagnate.

There are many bad market powers at play driving high chip pricing, but the limits of process node shrinks are the one real justification for higher chip costs over time.

I suspect as we go along we will get to a point where we can't go any smaller, and the very the smallest nodes will never grt their yields up, and will be super expensive due to the need to pay for a full wafer to only yield a handful of functioning chips.

GaN may help a little, but as of right now it has the problem of its transistors being "normally on" when no power is provided whereas most computing logic needs both "normally on" and "normally off" transistors. And even if we get to the point where we can make good transistors in GaN its only a matter of time until we reach the subatomic limits there too.

Something huge and transformational will need to be discovered rather soon if we are not going to see a complete stagnation in computing performance.

Funny enough I really think Intel's packaging tech will be a huge help here, lots of small little chips doing specific jobs, and rumors of individual CPUs being replaced with socketed SoC and the possibility of multi-socket becoming far more normal.

 

[Zarathustra[H]]

Funny enough I really think Intel's packaging tech will be a huge help here, lots of small little chips doing specific jobs, and rumors of individual CPUs being replaced with socketed SoC and the possibility of multi-socket becoming far more normal.

Yeah, clever workarounds will be where most gains come from pretty soon. Chiplets were just the beginning.

 

[sfsuphysics]

until one day it just won't be possible to go any further with silicon and we will need to find an alternative material or computing capabilities will seriously stagnate

Graphine!! That's the wonder substance still right?

 

[Lakados]

Graphine!! That's the wonder substance still right?

It is, there is just a slight problem with the cost and manufacturing it to scale.
Actually producing pure graphite is proving somewhat tricky as the slightest impurity seems to spoil the whole thing, so we currently lack the ability to produce pure graphene at any level even approaching that which we can silicon. Like 3 years to make enough for a single chip.
There are big companies working on it but they say it is still at least a decade out.
The current plans are to just something graphene-like during the back-end processing of traditional silicon in some form of hybrid.

 

[DukenukemX]

There goes Apple's M3. Guess it wasn't a bad idea to release their M2 series.

 

[Lakados]

There goes Apple's M3. Guess it wasn't a bad idea to release their M2 series.

Not quite, but yeah.
It’s going to be a split launch with the M3 in only the higher end parts. At least with the weak market as a whole that should help, cause nobody’s buying shit.