duby229 said:It goes back to that old saying "The truth, the whole truth, and nothing but the truth"
What you say is true, but it isnt the whole truth. You fail to take into account interupts and so on, which still to this day account for quite a bit of bandwidth. There are still others as well. PCI, and hence forth also PCIe addresses need to be addressed byt the CPU, and just a ton of other things as well. It goes a lot deeper then I can explain. That is the bottleneck.
Yup and I said that was the simple version minus buffers, ECC and etc... Please don't bring up the etc.. as if that's not what I was talking about. Interupts are part of the DMI, as is I/O, PCI BUS and etc.. on Intel's system as well, that's why I said look it up? Now there is a nice write up on APIC's if you like, go to Intel's site and read about it?
His explaination was spot on. What I think that what some people fail to realize is that memory addressing must be done by the CPU. No matter what device has that memory allocated. AMD uses something called an IOMMU, which to my knowledge has no equivalent in an Intel architecture, which means that all IO requests must be handled by the CPU.
Don't cloud your already bad judgement with your dislike for me?
So If all Intel can use is DDR2-667, that it doesnt matter if the chjipset supports DDR2-800, it will be bottlenecked at lowerbandwidths.
That is what he was trying to say. DDR2-667 will saturate the FSB bandwidth. Therefore anything faster then that is simply wasted. It really doesnt matter if the chipset supports faster memory. All IO requests are serviced by the CPU anyway, so all that extra memory bandwidth is being wasted.
I said 30 something posts ago that the Processor can't use more bandwidth than the FSB Provides. Now it's you guys who are drinking something for saying otherwise. If Conroe will be limited to its FSB 1066 or 8GB, plain and simply without a 1000 word post, and Dual Channel DDR2 800 that provides 12.8GB is used, the rest of the system will be abled to use some of that unused bandwidth.
One more time, ALL devices are NOT running on the FSB and are NOT COMPLETELY controlled by the CPU.
Intel is in the same situation that the nForce 2, and Athlon XP was several years ago. The chipset provides mor memory bandwidth, then the FSB can funnel to the CPU, and it is beingwasted.
Please put down the Crack pipe and Back away slowly? Advanced Buffers and DMI as Intel uses it weren't in play then. nVidia's Dual Channel was setup for its IGP, not the AthlonXP.
All this chatter and why, because Intel announces support for DDR2-800 for Conroe and you guys are trying to say its a waste, Gimmick or etc... right? No, that's trashing Conroe and very much the subject what this thread was about. I didn't say it would improve Processor Performance, I said SYSTEM PERFORMANCE.