forcemac101
[H]ard|Gawd
- Joined
- Feb 28, 2001
- Messages
- 2,031
Originally posted by USMC2Hard4U
The Intel Pentium 5![]()
![]()
![]()
"Power.... Performance.... Perfection"
That should be in the P5 Commercial![]()
Thats only 3 P's...what about 2 more? hehe
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Originally posted by USMC2Hard4U
The Intel Pentium 5![]()
![]()
![]()
"Power.... Performance.... Perfection"
That should be in the P5 Commercial![]()
Originally posted by mjz_5
why not get an opteron, why faster!
If it were SCO instead of Intel, the other 2 P's would be "Patents" and "Pay up"?Originally posted by forcemac101
Thats only 3 P's...what about 2 more? hehe
Originally posted by FrgMstr
I do not know.
Originally posted by AthlonXP
well i told you guys this on like page 7, also hey ted, can i get one of those chips from you after you are done playing with them?? Shipping wont be expensive since you live 2 hours from me.
Originally posted by Tedinde
Fugger from xtremesystems.org has put up some OC'd numbers in the forum. 4ghz+ 300fsb on a 2.8E.
OC'd prescott benchies.
Tried to look for a close compare at about the same mhz in my 3dmark2001, this was the closest mhz score i could find. I am running my memory @ 1:1 while his is 5:4, same tight timings though.
His card is a 9800xt, mines 9800 pro @ 460 core/ 365 memory in this shot as you can see., and about 2 months old. So it seems the prescott isnt doing to bad since his vid card is at stock speeds..
http://mywebpages.comcast.net/tedinde/photogallery/XFpics/compare.JPG
Mines a 3.2c on the left, prescott on the right. The mods are kinda off in that forum so be easy on them!!!
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Originally posted by pakotlar
his fsb is way higher than yours.
There's a lot of speculation but no real answers at the moment. One possibility is some sort of dual-core implementation, as the picture of the Prescott die clearly shows two integer execution engines, including 2 L1 data caches.Originally posted by VVVVVVVVVVVVVVVI
I
Also, I'm left wondering with all of the unaccounted transistors in Prescott (much more transistors over Northwood that aren't consumed by cache), PLUS the move to LGA 775... does Prescott have an on-die memory controller?
Another speculation is 64-bit registers. Too many rumours flying around lately.Originally posted by SLee:
There's a lot of speculation but no real answers at the moment. One possibility is some sort of dual-core implementation, as the picture of the Prescott die clearly shows two integer execution engines, including 2 L1 data caches.
http://www.abxzone.com/forums/attachment.php?s=&postid=662865
Originally posted by VVVVVVVVVVVVVVVI
I stand corrected on the pipeline 'rumors'. /Eats crow.
How much cooler are the 3rd stepping production CPUs over the review samples? Another website seemed to show a 10c difference.
Also, I'm left wondering with all of the unaccounted transistors in Prescott (much more transistors over Northwood that aren't consumed by cache), PLUS the move to LGA 775... does Prescott have an on-die memory controller?
Edit for clarity: Meaning another disabled secret feature like HT. The Althon64 has the ability to use an off-die Northbridge controller. When Intel releases Grantsdale/Alderwood and LGA 775, it could mean a move to the on-die controller. That could explain the extra pins.
/end pointless speculation
The costs involved in manufacturing a P4-based processor with a 1MB L2 and all the other enhancements on a .13µ process would have been prohibitive for the market segment this chip is aimed at. Prescott OTOH, manufactured with the .09µ process is priced comparatively with Northwood. Moreover, there was very little additional speed left in the .13µ process to begin with. Beyond 3.4GHz and the process becomes unreliable. Northwood tops out at this speed for a reason. Lastly, the longer pipeline is necessary for ramping quickly and outcompeting AMD, as I mentioned in my earlier posts. It's the strategy Intel adopted and it has largely been successful over the past few years. Who can argue with success?Originally posted by chrisf6969:
The should have just produced basically a Prescott core (all improvements EXCEPT longer pipeline) on the MATURE .13 process.
It would probably run faster & cooler, until they can get the .09 process straight. I know the die size would hurt them, temporariliy, but it cant be any worse than Williamettes were.
1Mb L2, improved HT, SSE3, etc.. various improvements on .13 would be the ticket at least temporarily.
Originally posted by APOLLO
The costs involved in manufacturing a P4-based processor with a 1MB L2 and all the other enhancements on a .13µ process would have been prohibitive for the market segment this chip is aimed at. Prescott OTOH, manufactured with the .09µ process is priced comparatively with Northwood. Moreover, there was very little additional speed left in the .13µ process to begin with. Beyond 3.4GHz and the process becomes unreliable. Northwood tops out at this speed for a reason. Lastly, the longer pipeline is necessary for ramping quickly and outcompeting AMD, as I mentioned in my earlier posts. It's the strategy Intel adopted and it has largely been successful over the past few years. Who can argue with success?
Originally posted by chrisf6969
I think we will see the real Prescott on 775 pins, when they enable the 2nd core (oops let the secret out)
Originally posted by 0ldman
when was hyperthreading announced?
wasn't it basically announced with the Northwood but not enabled?
Originally posted by chrisf6969
I think the strained (stretched) silicon is letting current leak. The layers are so thin to start with, then they stretch them out.... to allow the electricity to flow faster. I think its like stretching a balloon. After you stretch it far enough gases leak through.
The should have just produced basically a Prescott core (all improvements EXCEPT longer pipeline) on the MATURE .13 process.
It would probably run faster & cooler, until they can get the .09 process straight. I know the die size would hurt them, temporariliy, but it cant be any worse than Williamettes were.
1Mb L2, improved HT, SSE3, etc.. various improvements on .13 would be the ticket at least temporarily.
Originally posted by merlin704
Abit jsut released a BIOS flash for the IC7 board today for anyone that is interested.
1. Update Intel on screen branding (OSB) logo.
2. Update BBS code. This will fix some boot sequence issue with some SCSI
card.
3. Fixed the problem that the system cannot boot into Windows if
1) The OS is installed in the SATA hard disk when both the SATA and
PATA hard disk are present.
2) The PATA hard disk is removed after the OS installation.
4. Update CPU Micro Code.
5. BIOS compile date: 12/31/2003
Originally posted by pakotlar
Let me explain to you why you don't work at Intel. You are not an electrical engineer. You do not know what you are talking about. In fact, Intel believes your thoughts on what they should and should not be doing are insignificant. They are right. Let me edumacate you:
http://www.eetimes.com/semi/news/OEG20020813S0012
"We have figured out a way of changing the silicon lattice structure to allow faster electron flow a 1 percent change in silicon spacing to achieve a 10-to-20 percent increase in drive current. Intel is unique in that we can do this with no deterioration in terms of the short channel effect or junction leakage," the Intel fellow said.
http://www.xbitlabs.com/news/other/display/20030911140127.html
SOI and Strained Silicon appear to be the technologies that AMD and Intel pin a lot of hopes on during the next three to five years. Both technologies are intended to keep increasing the speed of current flowing through a microprocessor and to address the connected issues, such as power leakage. SOI adds a thin oxide layer to a silicon wafer in order to insulate the circuit against power leakage. Strained silicon deposites a layer of silicon germanium on top of a silicon wafer. This stretches the silicon atoms to let electrons flow faster through a circuit.
We don't have any 90nm AMD chips to compare to unfortunately. AMD has had 90nm problems in the past, but we have no idea whatsoever what their yields or power output numbers are going to be with 90nm A64 processors, or what they are currently.i doubt it's due to strained silicon. As AMD does not use it and they are having 90nm problems too.
Right, the leakage is probably less than it could be as a result of using the strained silicon. 90nm is so damn small that leakage is a huge issue.There is a leak problem but it's not due to strained silicon. they are simply increasing the length of electron orbitals.
Originally posted by batotman
Listening to these people you'd think Intel employees or microprocessor experts were in here.......NOT! Only in their own minds.![]()
Originally posted by merlin704
Pfffy, I work for Cyrix. That's why I know everything.![]()
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Originally posted by rayman2k2
I'm a bit confused bud, you had an Engineering sample right? Would the Retail perform a bit better than the ES?
Originally posted by pakotlar
cyrix is making a comeback! I swear! 10ghz cyrix processor!