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Official Bulldozer PPD??

i play with http://www.linuxforge.net/bonuscalc2.php the bigadv number where on either a 2685 or a 6900 both of those wu hit 13,859ppd at 50:11 fram times. A overclock to 4.9 which is 50% more power would net a fram time of around 33:00 = 25,774 ppd times are rounded in the FX's favor. why cant that guy be running a 2684 you say? minumum deadline is 57:36 which is 16,101 ppd 57:37 is 2,558 ppd.
 
any test with win8 developer preview? it suppose to handle the fx processor a bit better, at least on proper thread use....
 
x98gulinski said:
any test with win8 developer preview? it suppose to handle the fx processor a bit better, at least on proper thread use....
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I don't think it will make much difference if you are fully loading all of the CPU threads anyways.
 
x98gulinski said:
any test with win8 developer preview? it suppose to handle the fx processor a bit better, at least on proper thread use....
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I believe one review said Windows 7 doesn't handle the cache architecture properly on the FX processors and that Windows 8 showed a performance increase. I'll see if I can find the review.
 
yeah but the performance increases were ~5%
least on the one I saw.. there was 1 test that was like 14% better but ... you would think if it was a big deal amd would have pushed micro$haft to get its patch through by launch day.
 
It was anandtech that pointed out the differences in win7 vs 8 for the FX.
 
Tobit said:
faildozer :p
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the latest to carry the crown that has been worn by many

failrex (cyrex)
failscott (prescott)
failtualum (tuantualum)
IAfail (the entire line of IA-64 cpus from intel)

oddly for being a fan of intel, I seem to find a lot of intel products on my list, tho once I figguered out the care and feeding of my prescott, I was rather pleased with it's 3.9 GHz performance (lots of cooling and UNDERvolting)
 
Tobit said:
anandtech and Tom's are on the same level these days, 'nuff said. Back to faildozer discussion. :p
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What?!? Surely you jest. Anandtech provides some of the highest quality technical coverage you will find in the industry, Tom's provides a high chance of inspiring you to perform an auto-lobotomy.

Has anyone seen a detailed breakdown on where the 2B transistors were spent? That's what blows me away about all this, you would assume they went with the 'half cores' to keep die size down but its more than twice the size of Thuban with 33% more cores!
 
R-Type said:
What?!? Surely you jest. Anandtech provides some of the highest quality technical coverage you will find in the industry, Tom's provides a high chance of inspiring you to perform an auto-lobotomy.
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lol... unfortunately these days at anand it depends on the article and author... they do have some good stuff...but...not without blemish...
Toms...provides full article ads to the highest bidder...
 
R-Type said:
What?!? Surely you jest. Anandtech provides some of the highest quality technical coverage you will find in the industry, Tom's provides a high chance of inspiring you to perform an auto-lobotomy.

Has anyone seen a detailed breakdown on where the 2B transistors were spent? That's what blows me away about all this, you would assume they went with the 'half cores' to keep die size down but its more than twice the size of Thuban with 33% more cores!
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Yeah, bizarre. Maybe there's two more cores in there that nobody knows about
 
R-Type said:
What?!? Surely you jest. Anandtech provides some of the highest quality technical coverage you will find in the industry, Tom's provides a high chance of inspiring you to perform an auto-lobotomy.

Has anyone seen a detailed breakdown on where the 2B transistors were spent? That's what blows me away about all this, you would assume they went with the 'half cores' to keep die size down but its more than twice the size of Thuban with 33% more cores!
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I think more L2 cache.. cache uses up lots of transistors in a hurry
 
Activate: AMD said:
I think more L2 cache.. cache uses up lots of transistors in a hurry
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That would certainly be part of it, but Thuban is 6 cores and 2mb L2 (other caches equal) and is only 900 million transistors. Even if you assumed 200 million of that is L2 (that is way too high, L3 is in there too...), the increase to 8mb would only be another 600 million for a total of 1.5B. With those assumptions a single core would be roughly 100 million transistors so you would total at 1.7B. There is something else in there consuming transistor space....
 
Activate: AMD said:
I think more L2 cache.. cache uses up lots of transistors in a hurry
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That's definitely a big contributor. Bulldozer has 2MB of L2 cache per module, or whatever they call a set of two core-things (AMD's nomenclature for Bulldozer is not only complete trash, it's also misleading; their "multi-core" arrangement is only marginally more advanced than Hyperthreading, to the point where they really have no business calling their CPUs 8-core). In comparison, Sandy Bridge has 256KB of L2 cache per core and Deneb and Thuban both have 512KB per core.
 
Linden said:
All those power saving states would be off if you are full-time Folding SMP, overclocked.

My upgrade decisions for my Folding machines just became much simpler.
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Yeah, I upgraded my 890FXA BIOS for AM3+ but I don't think I'm gonna need it ...
 
R-Type said:
There is a certain logic to the expectation that Piledriver will substantially improve the faults in Bulldozer, particuarly if you are familiar with project management. Bulldozer is very late, and AMD certainly knew the performance was lacking well before that. Unfortunately, once initial design is done you are limited in the scope of changes you can make without essentially restarting the project. I think it would be conservative to say they knew the BD performance was not going to hit expectations at least two years ago and began taking actions with the followup Piledriver to fix it. We now just have to see if this project was managed more effectively...
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Well said R-Type. And as for Tobit: with your impressive OC on that Thuban it'll game/process almost anything you'll reasonably need to do, maybe a few less ppd or FPS but you won't have to worry about a new socket/mobo for at least another gen. Have fun and fold on and keep a few extra dineiros in your pocket too ...
 
WTF! 2MB L2 per core? Thats insane. Power gating could be eating up some transistor count.
 
R-Type said:
That would certainly be part of it, but Thuban is 6 cores and 2mb L2 (other caches equal) and is only 900 million transistors. Even if you assumed 200 million of that is L2 (that is way too high, L3 is in there too...), the increase to 8mb would only be another 600 million for a total of 1.5B. With those assumptions a single core would be roughly 100 million transistors so you would total at 1.7B. There is something else in there consuming transistor space....
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well you have to include new instructions, branch predictor for the deeper pipeline, wider FPU and more advanced power gating in addition to the extra "cores".. but I dunno, just guessing
 
Activate: AMD said:
well you have to include new instructions, branch predictor for the deeper pipeline, wider FPU and more advanced power gating in addition to the extra "cores".. but I dunno, just guessing
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Yeah, don't get me wrong, I'm sure the extra die size is spent on functioning features. The concerning element is that the chip's entire design philosophy was based around using 'half cores' to keep die size down but during the design process they apparently lost their way and ended up with a chip significantly larger than an equivalent thuban core setup but with lower IPC. When you make such a key design choice, everything other decision has to be aligned with it to be successful.
 
R-Type said:
Yeah, don't get me wrong, I'm sure the extra die size is spent on functioning features. The concerning element is that the chip's entire design philosophy was based around using 'half cores' to keep die size down but during the design process they apparently lost their way and ended up with a chip significantly larger than an equivalent thuban core setup but with lower IPC. When you make such a key design choice, everything other decision has to be aligned with it to be successful.
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Yea, I definitely get you, I'm curious too. The big die really raises the question: why not just add 2 more cores to thuban? Do the process shrink, add a better turbo mode, add a few extra gismos and instructions, clock a bit higher maybe.. That sounds like a better option all around than what we got. thats the most disappointing thing really... that every improvement by bulldozer over thuban would be blown away by a slightly better thuban
 
Activate: AMD said:
Yea, I definitely get you, I'm curious too. The big die really raises the question: why not just add 2 more cores to thuban? Do the process shrink, add a better turbo mode, add a few extra gismos and instructions, clock a bit higher maybe.. That sounds like a better option all around than what we got. thats the most disappointing thing really... that every improvement by bulldozer over thuban would be blown away by a slightly better thuban
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I totally agree.
 
Activate: AMD said:
Yea, I definitely get you, I'm curious too. The big die really raises the question: why not just add 2 more cores to thuban? Do the process shrink, add a better turbo mode, add a few extra gismos and instructions, clock a bit higher maybe.. That sounds like a better option all around than what we got. thats the most disappointing thing really... that every improvement by bulldozer over thuban would be blown away by a slightly better thuban
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Bulldozer was also designed to run at much higher clock speeds than Phenom II so it could achieve higher performance levels, but obviously that didn't work as well as AMD expected.
 
I dont even think they would have had to add 2 more cores to Thuban. Go the core 2 Quad route and just glue 2 denebs together and maybe a process shrink. Problem solved lol.

AMD keeps trying to reinvent the wheel and it never works for them. OMG Phenom is the first true quad core! Too bad it got it butt handed to it by "fake" quads.
 
Zero82z said:
Bulldozer was also designed to run at much higher clock speeds than Phenom II so it could achieve higher performance levels, but obviously that didn't work as well as AMD expected.
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right, but as we saw with Pentium 4, that has a downside of course. its also clear they didn't hit their clock targets to balance out the pipeline extension

Kardonxt said:
I dont even think they would have had to add 2 more cores to Thuban. Go the core 2 Quad route and just glue 2 denebs together and maybe a process shrink. Problem solved lol.
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I like it. Well lets just hope that since AMD is repeating the mistakes Intel learned with P4, their next major architecture will be super awesome and pave the way for AMD's dominance over Intel for years to come! Aren't role reversals fun? :D
 
Activate: AMD said:
right, but as we saw with Pentium 4, that has a downside of course. its also clear they didn't hit their clock targets to balance out the pipeline extension
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Except Pentium 4 worked out for Intel with the Northwood generation, since it was actually able to outperform everything else on the market. Not so much in this situation.
 
Activate: AMD said:
, their next major architecture will be super awesome and pave the way for AMD's dominance over Intel for years to come!
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Let's play mad libs

"( current architecture ) sucks, but don't worry, it's just because ( problem ) and next year they're going to come out with ( future architecture ) which is totally going to kick Intel's ASS!"

If it's 2007, insert "Barcelona", "TLB Bug", and "Deneb"

If it's 2011, insert "Bulldozer", "Low clock speeds", and "Piledriver"
 
I read somewhere (x-bit I think) that most of the performance issues have to do with the decoder not being fast enough to keep the two integer and one floating point unit fed.

Of course this does not matter because it is what it is at this point. Unless they make a revision to fix that problem it is just going to remain until piledriver comes out. I will just keep using my 2500k until Ivy Bridge comes out. Make no mistake I still hope AMD pulls something good out of their hat so I can switch back, but BD wasn't that product.
 
jebo_4jc said:
Let's play mad libs

"( current architecture ) sucks, but don't worry, it's just because ( problem ) and next year they're going to come out with ( future architecture ) which is totally going to kick Intel's ASS!"

If it's 2007, insert "Barcelona", "TLB Bug", and "Deneb"

If it's 2011, insert "Bulldozer", "Low clock speeds", and "Piledriver"
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I'm kidding, but I was trying to say that since AMD has pulled a Wilamette/Prescott that the only logical next step is to pull a Conroe :D
 
I'm kidding, but I was trying to say that since AMD has pulled a Wilamette/Prescott that the only logical next step is to pull a Conroe
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That was a dramatic transition. Let's hope AMD is also capable of such a feat.
 
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Linden said:
That was a dramatic transition. Let's hope AMD is also capable of such a feat.
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realistically? I know its not happening :\

Still, one can dream. Sadly they can't count on my dollars to help them through this difficult transition... my next upgrade will either be SB-E or IB
 
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