Intel Demonstrates MESO Logic Device as Alternative to CMOS

AlphaAtlas

[H]ard|Gawd
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Working with researchers at Berkeley, Intel has "invented" a magneto-electric spin-orbit device that could theoretically operate 10-30 times more efficiently than today's consumer electronics. While Intel doesn't directly comment on the rapidly approaching limits of CMOS scaling in their press release, they do say they're working on technology "that will emerge in the next decade for the beyond-CMOS era." In an interview, Ramamoorthy Ramesh, a scientist at Berkeley Lab, said the new technology "will take a decade," and noted that the proposed devices could operate at about 0.1V.

"MESO is a device built with room temperature quantum materials," said Sasikanth Manipatruni, senior staff scientist and director of Intel Science and Technology Center on Functional Electronics Integration and Manufacturing. "It is an example of what is possible, and hopefully triggers innovation across industry, academia and the national labs. A number of critical materials and techniques are yet to be developed to allow the new type of computing devices and architectures."
 

STrooperTK421

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I hate articles like this. It's nothing but "hey, praise (cough-investin-cough) us, we have da new goods comin' yo'!"*

*10-15 years time tables. Deadlines are hereby not implied as being certain. Values can change. Not valid in all states or US territories. Void where prohibited. See website for details.

This is the same kind of shit you see when some dweeb cooks up some new fucking battery using unobtanium carbon-fiber nanotub spunk and the internet shits itself with "OMGWOWZERS my EV will go 3651658465165.6361 Km on a single charge and power armor and phasers too!" Then only to find out the "cell" that was constructed was done using some weird method and the cell itself is smaller than a postage stamp and would cost $5.5 Million to make one 18650 or some shit.

Just sayin...
 

WBurchnall

2[H]4U
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I hate articles like this.

....(cut)

This is the same kind of shit you see when some dweeb cooks up some new fucking battery using...

That's great an all except this isn't some dweeb. This is Intel. A massive corporation with almost unlimited resources and high motivation to continue to make progress after the CMOS end.

I bet you'd have said the same thing about quantum processors ten years ago about yeah yeah yeah, technology we'll never see... But IBM has that on the market for researchers.[/QUOTE]
 

KD5ZXG

Gawd
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Mar 24, 2017
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632
Dunno what intel has up thier sleeve or not.
Not enough research paywall leaks to piece together any real info.
Seriously doubt they are using Majoity Logic. Its just a slide...

My own 8bit spintronic ALU project simply stores logic tables in a huge Everspin MRAM.
AND, OR , Multiply, Cosine, complexity doesn't matter cause its all pre-computed. 35ns...
Leftover table space can hold ram, rom, registers, flags, terminal fonts, prOn, stack, etc.
Hardest challenge is hand soldering TSOPII package to a DIP adaptor.
 

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serpretetsky

[H]ard|Gawd
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Dec 24, 2008
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Dunno what intel has up thier sleeve or not.
Not enough research paywall leaks to piece together any real info.
Seriously doubt they are using Majoity Logic. Its just a slide...

My own 8bit spintronic ALU project simply stores logic tables in a huge Everspin MRAM.
AND, OR , Multiply, Cosine, complexity doesn't matter cause its all pre-computed. 35ns...
Leftover table space can hold ram, rom, registers, flags, terminal fonts, prOn, stack, etc.
Hardest challenge is hand soldering TSOPII package to a DIP adaptor.

You mean every single input combo is precomputed? Like 3x5 has a table entry?
 

KD5ZXG

Gawd
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Mar 24, 2017
Messages
632
Correct.

https://www.everspin.com/parallel-interface-mram

The big MRAM can hold 32 tables of byte vs byte = byte.
But tables are not limited to that method of organization.
Pinout allows for 20 bits in, 16 bits out as a pair of bytes.
The two bytes can mux to a single 8bit result if desired.

For example:
Multiply occupies two tables to give two bytes of fixed point HL.
Divide occupies five tables to give fixed points L.XYZ and Modulo
Add uses two tables, giving simultaneous with and without Carry.
*** Then mux away whichever answer doesn't fit the case ***

Cosine treats both input bytes as a word, covering 1 quadrant.
Square root also treats both inputs as one word.

On the other hand: 512 single input byte functions fit two tables.
Even though all shifts and rotates could fit in one table with room
to spare, I used two tables. Same as ADD, so carry can select
the relevant result. 256 functions with 256 alternates I suppose...
Ran out of useful ideas around 64, let the rest be a scratchpad.

Sixteen single bit results (flags) are packed into two tables.
Eight cases of byte vs byte = bit. And eight alternate cases.
So flag in can affect flag out.

Who needs logic?
 
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KD5ZXG

Gawd
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Simplified table of tables from earlier this year, details keeps evolving.
Looks a little better in fixed font width like notepad.

ICL ICH DCL DCH 16bit increment (also steps program count), decrement
MPL MPH MIN MAX Multiply HL=A*B,, Lesser of two evils, Greater
DVL . DVW DVX DVY Division using fixed points HL.WXY (MDL=Modulo)
MDL . HCW HCX HCY Half Cosine of the 1st quadrant (waste no byte for 1)
QRL . QRW QRX QRY sQuare Root (avoid confusion with SQL or Shift Right)
IOR XOR NOR AND Inclusive Or, Exclusive Or, Nor, And
ADD AWC FUN FWL Add, AddWithCarry, Function, FunctionWithLink
SUB SWB FLG FWF Subtract, SubtractWithBorrow, Flags, FlagsWhenFlagged
-Flag Bits-
FUN/FWL's Link fn(A,B,0) , fn(A,B,1)
ADD/AWC's Carry a+b>FF , a+b>FE
SUB/SWB's Borrow a<b , a-1<b
SUB/SWB's NonZero a<>b , a-1<>b
AND/IOR's NonZero Bitmask test , Sixteen bit AB<>0
MDL/RND's NonZero remainder exists, XOR(b15,14,12,3)
MAJ/MW1's Majority of 17 input bits including flag
PTY/PWC's Parity of 17 input bits including flag

Raspberry Pi running FUZE BASIC computes and bitbangs tables to MRAM.
Put Spintronic ALU in resume and smoke it. Still not a complete CPU yet.
 
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