erek
[H]F Junkie
- Joined
- Dec 19, 2005
- Messages
- 10,954
Found some as yet to be covered GDDR7 Intellectual Property Previews / Hints. So an exclusive for [H]. There's apparently a draft GDDR7 JEDEC specification somewhere!
"GDDR7 Memory Model
GDDR7 Memory Model provides an smart way to verify the GDDR7 component of a SOC or a ASIC. The SmartDV's GDDR7 memory model is fully compliant with draft GDDR7 JEDEC Specification and provides the following features. Better than Denali Memory Models.
GDDR7 Memory Model is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env
GDDR7 Memory Model comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.""
http://www.smart-dv.com/memory/gddr7.html
https://www.chipestimate.com/log.php?from=/SmartDV/GDDR7-Memory-Model/datasheet/ip/46681&logerr=1
"GDDR7 Memory Model
GDDR7 Memory Model provides an smart way to verify the GDDR7 component of a SOC or a ASIC. The SmartDV's GDDR7 memory model is fully compliant with draft GDDR7 JEDEC Specification and provides the following features. Better than Denali Memory Models.
GDDR7 Memory Model is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env
GDDR7 Memory Model comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.""
http://www.smart-dv.com/memory/gddr7.html
https://www.chipestimate.com/log.php?from=/SmartDV/GDDR7-Memory-Model/datasheet/ip/46681&logerr=1