http://www.fujitsu.com/global/about/resources/news/press-releases/2018/0621-01.html
The post-K prototype will be exhibited at ISC 2018, which will be held in Germany from June 24--28.
(48 + 2) or (48 + 4) cores per node, built on top of ARMv8 ISA plus SVE extensions (implemented with 512bit wide vectors).
I guess the new ARM-based chip will look very much as the former SPARC-based supercomputer (32+2) chip
The post-K prototype will be exhibited at ISC 2018, which will be held in Germany from June 24--28.
(48 + 2) or (48 + 4) cores per node, built on top of ARMv8 ISA plus SVE extensions (implemented with 512bit wide vectors).
I guess the new ARM-based chip will look very much as the former SPARC-based supercomputer (32+2) chip
