E6500/P45 GTL question

graysky

Gawd
Joined
May 6, 2007
Messages
620
I'm not looking for an extreme overclock w/ the E6500. I'm tuning 10.5x333 right now and think that I have it stable but I'm wondering about my GTL settings. Should I be adjusting these down to 0.63x on the two CPU settings and leave the NB @ 0.67x? This is what I'm seeing in some posts with the P45 and a 45nm dual core chip. The stock GTL settings are 0.67x for all three.

Settings:
CPU: E6500 @ 10.5x333= 3,496 MHz, VID is 1.2875 and am using a +50 mV
MB: BI-P45-T2R using BIOS B245D914

Vcc (CPU-Z) = 1.296 V (load) and 1.136 V (idle)
Vtt=1.18 V
NB=1.1950 V
Using the 266/800 strap (1001 MHz on the memory)

GTL-CPU1 - 0.63x
GTL-CPU2 - 0.63x
GTL-NB - 0.67x


Memory: Corsair Dominator (2 x 2GB) DDR2 1066 (PC2 8500)
5-6-6-18 @ 1,001 CMD4GX2M2A1066C5
PSU: Corsair 400 W
 
Below is simplified a bit. The link provided is what you want if you really want to get into it. If you stick with it about the middle of the article linked it provides a hint of how to test and see what changing Vtt and GTL levels do for you.


GTL (gunning transceiver logic) is the circuity/scheme that defines what a logic one (voltage above a certain value ) or a logic zero (voltage below a certain value) on the address and data busses of the FSB.

As high FSB values make the window of time (called the eye for obvious reasons if you see a timing diagram) smaller it sometimes help to move that area of a valid one or zero around.

The x in 0.63x is Vtt meaning that the transition level for a zero to a one is 0.63 of Vtt. or whatever you set the GTL to. 0.67% of Vtt for a logic transition is stock by Intel specs as you noted.

Without an Oscope watching the buss it is impossible to know what to do other than anecdotal results reported by other people and every board/CPU is different due to component tolerances etc. So all you can do it fool around.

Stock Vtt is 1.18 volts so with a stock GTL of .67 that means a bit on the buss with a voltage value of 1.18x.67 = 0.79v (+/- 10%) or more is considered a logic one. If you raise Vtt and leave GTL alone it will take more voltage to be a "one". If you raise vtt and reduce GTL you will be closer to stock specs. If you raise both it is likely you will get data errors. But who knows. Again without a scope or logic analyzer you are just trying stuff to see what happens and unfortunately that is about all we can do.

if you are under 400FSB I really doubt changing them will do anything but case errors and force data retransmission on the buss or worse.

This might help . ( I had to read it 4 times myself but its worth keeping at it and studying the graphs if you really want to know how the FSB works).
http://www.thetechrepository.com/showthread.php?t=87
 
Thank for the explanation and the link. I've actually read that before, but it's not written for an average person to understand as you pointed out.

The system is p95 stable for 24 h with the settings I posted in my first thread; I see no ill effects from using the 0.63x for the two CPU values. Dunno if I wanna change it now that it's stable.
 
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