Official review will be going up a little late but Rys@B3D had this to say as a little preview:
Random question answering from the thread and notes on things, since I won't have anything for NDA expiry (it's already 2am here, I'm not done, and I have work in the morning sadly):
It's the single most impressive graphics processor I've ever seen, when looked at as a whole.
Random question answering from the thread and notes on things, since I won't have anything for NDA expiry (it's already 2am here, I'm not done, and I have work in the morning sadly):
- FP16 filtering is half speed, and the samplers are limited by available interpolators (only 32 texcoords/clk) when processing INT8 at full speed
- 260mm2, 960M transistors or so
- Huge focus on area efficiency and perf/watt
- Chip was pad limited in the beginning***, so the last couple of SIMDs are value adds that weren't originally planned for. Explains the first point a little bit.
- ROPs are mostly 2x everywhere measured with MSAA and really help the chip go fast. ROP MSAA downfilter this time.
- Seems to be 64KiB L1 per sampler with huge L1 bandwidth, new design
- Finding peak rates everywhere on the chip has been easy. I've seen 1Tflop FP32, full bilinear rates and peak INT8 Z-only (256 Zs/clock, yay!)
- GDDR5 is really what lets the chip kick some real ass
- GS perf is up compared to RV670, maybe a new (bigger) coalescing stream out cache there, and more threads in flight
- Colour cache is per ROP, same as R6
- 16KiB per SIMD shared memory + 16KiB global (not the SMX)
- All 800 SPs are fat. 1 FP32 MAD or 1 special or 1 FP<->INT or 1 integer op/clock each
- New caching scheme for the RF I think
- Orlando-led design but very distributed in terms of teams. Scott Hartog led, and he worked on i740 at Intel
- Over 5MiB of SRAM on-chip if you count every pool
- New UVD block with 7.1 over HDMI
- No ring bus MC, new controller nice and efficient due to new ROP design
It's the single most impressive graphics processor I've ever seen, when looked at as a whole.