AMD AT CES

I know where you got the 100.76 value. Intel reported it some time ago. Semiwiki, however, has it at 103 - saying that Intel is underestimating density. Many other sources cite the 106.1 value I am using (feel free to look it up, it's everywhere). I used the one that would paint Intel in the best light. I will accept any of these three values, however.



I've been reading a lot of material on this. I could not find any official numbers for 7HPC - even at the usual sites - vs 7FF. If you are right, then it's more like a 10-12nm process, in which case Intel's 14++ is almost as good. But I did not get the impression there are a great density difference between the two.

If you have official material on this, link me.

100.76 is the value given by wikichip. 100.8 has been measured by TechInsigth on a Canonlake chip.

The parameters for the 7HPC node used by AMD were given by David Schor


TSMC 7nm has an advantage over Intle 10nm in SRAM cell: 0.027 um² vs 0.0312 um².
 
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100.76 is the value given by wikichip. 100.8 has been measured by TechInsigth on a Canonlake chip.

Don't see any measuring there... just a restatement of existing Intel number 100.76 number.

103 can be found here: https://www.semiwiki.com/forum/content/7191-iedm-2017-intel-versus-globalfoundries-leading-edge.html
106.1 can be found here:
This is referring to a different SemiWiki post. Note: YOU are also in that thread ;).

However, to repeat, I will accept any of these three values as more or less correct. Probably not worth picking this nit.

The parameters for the 7HPC node used by AMD were given by David Schor

Here's the rub: I can't find this value anywhere else, or anything close to it in official documents. The nearest thing I can find does not distinguish between 7FF and 7HPC regarding density. All is labeled under TSMC 7nm (this is the case on wikichip as well, you will notice). This may be because not much has been released about 7HPC? 66 MTx/mm2 is very poor density for a "7nm" process. 96.49 is much better, though still inferior to Intel's 10nm (regardless of which of the three values you believe most accurate).

TSMC 7nm has an advantage over Intle 10nm in SRAM cell: 0.027 um² vs 0.0312 um².

Density is the closest "get the gist of the process" metric I can think of. I don't mind sperging into the process details, but I don't know that anyone else here cares. The main point I was making was that Intel's 10nm was slightly better (overall) than TSMC's 7nm. Because of marketing node labels, that's not always immediately apparent.
 
It's possible I'm misreading something here, btw. Not trying to be a jerk or anything. I do agree that the 96.49 is for 7FF not 7HPC (this was confusing because all labeled under "TSMC 7nm" - someone should correct that). However, detailed specs on 7HPC appear very thin on the ground right now. Do you have something more... official than a tweet?
 
Don't see any measuring there... just a restatement of existing Intel number 100.76 number.

You have to get the report to see the full set of measurements of the silicon.

103 can be found here: https://www.semiwiki.com/forum/content/7191-iedm-2017-intel-versus-globalfoundries-leading-edge.html
106.1 can be found here:
This is referring to a different SemiWiki post. Note: YOU are also in that thread ;).

However, to repeat, I will accept any of these three values as more or less correct. Probably not worth picking this nit.

I prefer measured values. So I will continue using 100.8.

Here's the rub: I can't find this value anywhere else, or anything close to it in official documents. The nearest thing I can find does not distinguish between 7FF and 7HPC regarding density. All is labeled under TSMC 7nm (this is the case on wikichip as well, you will notice). This may be because not much has been released about 7HPC? 66 MTx/mm2 is very poor density for a "7nm" process. 96.49 is much better, though still inferior to Intel's 10nm (regardless of which of the three values you believe most accurate).

7HPC gets higher performance by relaxing the node parameters compared to 7FF. The same happens with the logic libraries for Intel 10nm. The Ultra-high-performance libraries are much less dense than the high-density libraries.
 
You have to get the report to see the full set of measurements of the silicon.

I'll take your word on it, then.

7HPC gets higher performance by relaxing the node parameters compared to 7FF. The same happens with the logic libraries for Intel 10nm. The Ultra-high-performance libraries are much less dense than the high-density libraries.

Makes sense. However, do we have density values for this in any kind of documentation somewhere?
 
Some of the shit they do to shrink nodes these days is just fucking insane.

I don't know that we can get much smaller than we are now. Kind of sad.
 
I dont think we are going to get lower than 5nm.

We approach the limits of the electron shell on silicon. there is going to be a limit where electrons will no longer transfer properly between atoms unless some serious new doping comes about.
 
I dont think we are going to get lower than 5nm.

We approach the limits of the electron shell on silicon. there is going to be a limit where electrons will no longer transfer properly between atoms unless some serious new doping comes about.

real 7nm or fake "7nm" ?
 
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