![[H]ard|Forum](/styles/hardforum/xenforo/logo_dark.png){kind=logo}
Then do you have a better explanation? So far he is the only one I have seen and his history (his work history not posts) makes his assumptions rather likely, at least more than some others.
Yes.
First he isn't pretending to know all, and like anyone he can be wrong. However reading that white paper he is correct. Nvidia is quite sly as they don't directly comment on concurrent graphics and compute they however mention the use of pre-emption for -context switching- (not verbatim but easily inferred). And based on the white paper it is fair to conclude he is correct that compute tasks can not be issued at the same time as graphics tasks but can run concurrently given resources are available. Probably why we see increases with async on Pascal but no where near as huge as AMD.
No they don't! They talk about dynamic load balancing for async!
You have to stop this "chicken or the egg" argument. You keep doing it. Look at it like this: You have the latest Intel CPU and you are forced to use SSe2 although you have access to AVX2. Now is it Intels fault that they cant run SSe2 as fast as AVX2? I know you are thinking competition, but that has no bearing on the point. Fact is that, like the example, AMD GCN needs that DX12 to show their full potential, just isn't going to happen with DX11 no matter how many times you complain about it.
The part in yellow was the part I was talking about not the VR section. Besides, read between the lines. I always look at what they don't say and it is glaring how absent the discussion is on CONCURRENT execution although they start with the loaded async term definition.
This is not chicken and the egg, the argument is several years ago AMD locked themselves in an architecture that gave their customers no advantage and are just now seeing it finally pay off; the question now is will it even matter. They lost a lot of market share betting on future tech that took forever to see the light of day. Nvidia is not going to just roll over for AMD now that DX12 and Vulkan are showing up. Also GCn still sucks at Tesselation.
He's very obviously wrong, as he has been in the paste in his haste to point out some fatal flaw in nvidia's engineering
Dedicated an entire gpc to compute is a huge waste of geometry resources, it makes no sense at all. Preemption has nothing to do with async compute, I don't know why people keep mentioning it. Preemption is almost antithetical to async compute, because you don't want to preempt the task unless there's a stall
One of the best CPU I had was an Athlon 64 x2. I rocked that till 2013.
Anandtech said:
Wrong on both counts, at least misleading on one. First the benchmark isn't heavy on use of async so it isn't a "best case" scenario. Second is this use of the word "support". The Nvidia supporters are trying overly hard to make the bridge of true support and adaption whilst obfuscating the terminology. Async as most will associate it as being concurrent execution of tasks. Pascal seems to get closer to this still as of yet is not capable of doing. If some of the discussions are correct then it can process concurrently/parallel but still must assign the tasks serially which is why it isn't true support of async. It is also why 5-10% is modest and proof positive that this benchmark is not making heavy use of async.
From what I gathered AMDs ACEs kind of act independent so it can accept tasks whilst others are doing others regardless of G or C. Whereas Nvidia must context switch at least with Maxwell. It looked to me that Pascal was looking more like a ACE-like setup, could be that their die-plot-chart was missing some parts (is the Gigathread gone?). Preemption is only necessary when a task must be moved for a more critical one, yes, but looks like for now that is how Nvidia is circumventing it - the concurrent execution of tasks.
The yellow part is why I don't trust you, that and you have given little evidence against any theory anyone else can give. I have spent the last year or more explaining why AMDs performance in DX11 was an architecture issue not a driver issue. Turns out I was right (posted lots of documented proof in other threads). Here again using Nvidias own whitepapers one can easily discern a reasonable theory on how async works on Pascal and based on their own words can see that concurrent execution of tasks is apparently not supported. Now as I mentioned it looked as though they could concurrently execute but they kind of hinted at still needing a context switch but I felt that was per each GPC(? I think that was the right terminology) and that they might be able to be independent of the others which would allow for parallel execution but for some reason not in assigning of these tasks hence the serial part. You kind of see this with the graph/picture where the G was finished and then the C was able to spread from one GPC to it to finish faster, so it is safe to assume that they context switch per GDC not the chip as a whole as Maxwell seemed to do.
