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Xeon Phi

so these things are out there, anyone play with them yet?
 
The compute cluster at my college has a couple, but I don't think I get to play with them...
 
Phi cores are not on the same level as SB or IB cores...
They are a throw back to the 90s lol...

Extreme tech has an interesting article about it if you enjoy drinking salt with articles...
http://www.extremetech.com/extreme/133541-intels-64-core-champion-in-depth-on-xeon-phi

Yeah, I am familiar with what the Phi cores are.

They are missing several instruction sets that CPUs have, if you tried running fah on then you would run into problems and emulation would slow it down too much.

It seems as though you can emulate the SSE stuff using the 512 bit vector units without much performance loss with that ScaleMP software. Seems like it should literally run FAH out of the box and actually be pretty fast. I would love to get my hands on one to play with.
 
http://www.amazon.com/Intel-SC5110P-Xeon-5110P-Coprocessor/dp/B00B133YNK

Product Features
PCI-Express 3.0 x16
8GB memory
1.053 GHz Clockspeed
60 Cores / 240 Threads

Isn't there a flag to turn optimizations off?

Would it really run FAH? How would the client "see" it as? Another SMP machine? An extension of the existing SMP mobo?

You missed the "Technical Details" link:

Code:
 Technical Details

    Brand Name: Intel
    Item Package Quantity: 1

It would be interested to see how the 240 threads at 1.053GHz preform.
 
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http://www.amazon.com/Intel-SC5110P-Xeon-5110P-Coprocessor/dp/B00B133YNK

Product Features
PCI-Express 3.0 x16
8GB memory
1.053 GHz Clockspeed
60 Cores / 240 Threads

Isn't there a flag to turn optimizations off?

Would it really run FAH? How would the client "see" it as? Another SMP machine? An extension of the existing SMP mobo?

At the moment fah wouldn't see it. The Phi runs its own Linux OS, you would need a version of fan that runs on the Phi and then you would either need a new core or to emulate the missing instructions.
 
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It would be wild if it could seen as an extension of the mobo, much like multi-processors are.

Imagine putting 4 of those in an SR-2 rig? ~SMP984?

You'd nickname it Stalin: "Quantity has a quality all of it's own."
 
It would be wild if it could seen as an extension of the mobo, much like multi-processors are.

Imagine putting 4 of those in an SR-2 rig? ~SMP984?

You'd nickname it Stalin: "Quantity has a quality all of it's own."

Think of it this way, the Phi is a separate computer that gets power from the PCI-e slot, it also networks and is controlled via the PCI-e slot. You need the software running on the Phi and on the main PC.
 
The 8 CPU Tyan S4985 Transport VX-50 has 4 CPU's on the mobo, then another 4 CPU's hooked up via a pair of PCIe-16 slots in the center of the board. I believe FAH sees it as 8 CPU's SMP?.

So I'm think at least in theory, you can band CPU's together via PCIe?

I know there are a lot of older computers that did not have the CPU on the mobo. You had cards that plugged in. I have an antique telephone company computer with 8 CPU slots, but only one is populated. It runs an early Intel Dual Core (MP?) and Win 2000.
 
DOH!!! The wildly different clock speeds would make it pointless.

Multi-CPU boards work because they are in sync. You can't do that with something that isn't clocked the same?

But perhaps you could sync the Phi's if they have a command to do so?
 
DOH!!! The wildly different clock speeds would make it pointless.

Multi-CPU boards work because they are in sync. You can't do that with something that isn't clocked the same?

But perhaps you could sync the Phi's if they have a command to do so?

The Phi has its own architecture with a smaller instruction set, even if you could sync up the clock they would be too different to work as one.

And the Phi is designed to use its own operating system, where as with the linked boards they use one OS.
 
You can make it all act like one big system, using the main CPU's + the Phi CPU's, using that ScaleMP software, however I'm not sure ho well it would work.

But remember, HPC is what this thins is designed for from the get go in the first place, so it's not like you are doing a total hackjob.

I wish I had $2g's to spare so I could get one of the 3000 series ones even, just to play with...
 
Hardware procurement cost is relatively small obstacle.

I'm generally disappointed with ScaleMP's sales team though -- they're worse than used car salesmen.
 
What is: https://www.openfabrics.org/index.php It's GNU freeware?

It appears to be used in supercomputers via Infiniband cards.

Can it make a single virtual machine out of multiple identical blades?

Any input on this? Not necessarily with Phi but with existing hardware in general.

I have not the MPP scaling/VM wherewithal to make a judgement on this or scaleMP as to whether they're even legitimate things to look into at this point. I'd be much more willing to make a large investment in MPP communication that would allow me to scale with what I have than on folding-specific hardware. (As would a lot of other people I'm sure ;)). It appears to me that GPU QRB still isn't there from a PPD/W standpoint.

**Edit** Disregard, I found the thread. Evidently the Holy Grail still eludes us... **Edit**
 
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Release date is....some time in may for the following:-

Intel® Xeon Phi™ coprocessor 5120D, 3120A, 3120P, 7120P, 7120X
 
Here's a question.

If the SMP client has a default limit at 32 threads, does that mean it generates a unique SMP job for thread counts over 32?

ie - Would two 32 thread machines actually have to communicate at high speed with each other if combined into one virtual machine?
 
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