What's the deal with INTEL?

A

astolpho

Limp Gawd
Joined
Jul 12, 2004
Messages
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I keep hearing conflicting messages. I read a disturbing message about a month ago that said the age of speed was over and they have hit a limit to how fast they can go with current technology, next they will be going to heavily multiprocessing platforms putting a lot of the M-class chips into everything. But then I still read messages that say they are coming out with a new processor in Oct that will be 3.8 Ghz and 64-bit. Anyone got the straight story?
 
I doubt a 4 gihz cpu will be out by xmas. Maybe on Paper. Dell is even having trouble with the 3.6's they said it will be out by december.
 
<--- Hates Dell anyway, there will be so much speed and clock cycles soon, you wont even be able to tell the differance.
 
There is an industry-wide problem with 90nm and clock scaling. The big problem is current leakage @90nm wastes a ton of power. At this point I'm wondering if you'll ever see an official 4GHz inferno. I'd expect the industry to start moving towards more efficient per MHz designs and multiple cores on a chip.
 
The theoretical upper limit for CMOS technology is some ridiculously low ns number to switch; I don't remember. However, that would enable frequencies up to about 12GHz. However, with semiconductors made out of carbon nanotubes, the prototype one anyway, who knows what kind they will eventually use in actual chips?? Either way, the theoretical upper limit is about 100GHz, and it's abotu 0.062ns switch time, I think? Don't quote me on that one though ;)
 
sandmanx said:
There is an industry-wide problem with 90nm and clock scaling. The big problem is current leakage @90nm wastes a ton of power. At this point I'm wondering if you'll ever see an official 4GHz inferno. I'd expect the industry to start moving towards more efficient per MHz designs and multiple cores on a chip.
Click to expand...

There's a problem with extremely high frequency 90nm transistors and leakage.
Intel uses two different 90nm transistors (2 PMOS and 2 NMOS that is), one a lower frequency, lower drive current, which have a fairly low leakage current, about 40nA/um, or about 6% of the drive current. And a high frequency high drive current transistor, which has a leakage current of 400nA/um, or 50% of it's drive current. (that's not to say 1/2 the drive current is bled off, but only to give you an idea how big a difference it is)

Intel has been using the latter in increasing numbers on the critical paths of it's desktop CPUs to reduce the delay due to transistors.
While Pentium M CPUs use the more power efficient transistors almost exclusively. Which is one of the big reasons Dothan maintained such an absurdly low power dissipation.


But to the OP, yea, Prescott is going to be the last CPU, atleast for a few years, that is built with immense clock speeds in mind. We might not see a direct port of Pentium M to desktops, but the next core will be built with multiprocessing, multithreading, and a high degree of parallelism, not clock speed in mind.
In a few years we'll start seeing transistor tech catching up to these strataspheric clock frequencies, high K insulators, metal gates, multi-input transistors (like AMD/IBM's T gates and Intel's Tri-gates), which can reduce leakage current by up to 99%, at the expense of gate capacitance and RC delay, but those are hurdles for another time.
 
my friends professor at purdue supposedly has a patent or design or something for a chip that could do about 5 ghz... i think it is for intel... i really didn't pay too much attention when he said it, he was using that as an example to why his prof knew his shit.... he was telling me about how his prof told him all about how they grow cores and the ones at the outside of the wafer usually fail and shit...

but i don't see any reason why speeds would stop increasing... they won't be doubling every 2 years like they have in the past (or did they) but they will keep increasing...
 
scottatwittenberg said:
but i don't see any reason why speeds would stop increasing... they won't be doubling every 2 years like they have in the past (or did they) but they will keep increasing...
Click to expand...

....same reason your car won't go 350 MPH; at some point, believe it or not, physics matters.... :cool:

Rock on - B.B.S.
 
scottatwittenberg said:
but i don't see any reason why speeds would stop increasing... they won't be doubling every 2 years like they have in the past (or did they) but they will keep increasing...
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you should reword it to say preformance will keep increasing Frequency is not everything. Both intel and amd know it.
 
M4d-K10wN said:
The theoretical upper limit for CMOS technology is some ridiculously low ns number to switch; I don't remember. However, that would enable frequencies up to about 12GHz. However, with semiconductors made out of carbon nanotubes, the prototype one anyway, who knows what kind they will eventually use in actual chips?? Either way, the theoretical upper limit is about 100GHz, and it's abotu 0.062ns switch time, I think? Don't quote me on that one though ;)
Click to expand...
Couldn't it be a practical use to setup a processors transistor layout in which the high powered transistors which leak more power would leak into transistors set at a lower power setting, but the low power being able to stand the power of a high power transistor which would theoretically help out the power wasting problem?
 
M4d-K10wN said:
The theoretical upper limit for CMOS technology is some ridiculously low ns number to switch; I don't remember. However, that would enable frequencies up to about 12GHz. However, with semiconductors made out of carbon nanotubes, the prototype one anyway, who knows what kind they will eventually use in actual chips?? Either way, the theoretical upper limit is about 100GHz, and it's abotu 0.062ns switch time, I think? Don't quote me on that one though ;)
Click to expand...

Transistors actually aren't the dominate factor in propogation delay anymore, atleast in many cases.
A 90nm high frequency gate has a switching delay of as little as 3-4 picoSeconds. (.003ns, or about 300 gigaHertz). That decreases some as temperature increases, but not that much.
But even on a low K Cu process, if a signal has to propogate beyond the first (or perhaps second) layer of metal interconnects it actually takes far more time to propogate the signal than to propogate the logical result through the gates.

Lower (weaker) dielectric insulation (or the 'k' value) around wires (and gates by extension) helps improve the speed at which signals propogate through the wires. (at the expense of increased leakage current) Which is why 'low-k' or atleast low-er-k processes are such a big deal right now.
 
The smalles silcone based cpu can get is .30
Then you got to switch to another material because the atoms can no longer handle the physical structure of a transistor.

I think Boron is the next metal they are going to try to develope cmos out of. (I read it in a chemistry article) Because of its light atomic weight its perfect for scale down. Its also very expensive
 
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