I was looking at some bench marks and those little CPUs destroy P4s on the lower end and they are only 1.3 ghz fanless..... is it possible to over clock them REALLLY high to the point they could hang with a 2.53 or around that area? just an intresting thought seing as they are only 30$ if you could make them run realllllllly fast it could be worth it.
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VIA C3... just maybe...
- Thread starter boxerchip
- Start date
Nope. They don;t overclock very well at all, which is a bit suprising because they run so cool. You want a cheap low power CPU that might overclock, check out AMD's Geode NX. It kicks the crap out of a C3 and it might overclock ok as it is essentially a modified and die shrunk Athlon. I have not seen any overclocking numbers for it but somebody has to be the first to try and I can't see why it wouldn't overclock ok.
chrisf6969
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huh? clock for clock Via's are not exactly that fast.
ex: I have a 1Ghz Via C3 and its about as fast as a 600Mhz Pentium 3.
They are a different architecture which simply cant crank up to 3Ghz like a P4. So dont think "Wow, its only 1Ghz... let me 3x my speed by overclocking it to 3Ghz.
What you really want is a Pentium M on a desktop mobo with overclocking features. That I think would kick some major ass. They are almost equivalent to A64's on a clock for clock speed, and they dont even have an integrated memory controller.
Ex:
2.4Ghz A64 or FX-53 beats a 3.6Ghz P4. (50% faster CPU gets beat)
2.0Ghz Pentium M about equal to a 3.0Ghz P4 (50% faster CPU about the same)
Pentium3's were super fast compared to P4's for CPU power, but just sucked b/c of the limited FSB/bandwidth.
I want Via (or someone) to make a mainstream mini itx mobo for a Pentium M. They currently have them for P4's, why wont they make one for a Pentium M.
Ok, I've seen mini boards for industrial use, but they were very expensive.
ex: I have a 1Ghz Via C3 and its about as fast as a 600Mhz Pentium 3.
They are a different architecture which simply cant crank up to 3Ghz like a P4. So dont think "Wow, its only 1Ghz... let me 3x my speed by overclocking it to 3Ghz.
What you really want is a Pentium M on a desktop mobo with overclocking features. That I think would kick some major ass. They are almost equivalent to A64's on a clock for clock speed, and they dont even have an integrated memory controller.
Ex:
2.4Ghz A64 or FX-53 beats a 3.6Ghz P4. (50% faster CPU gets beat)
2.0Ghz Pentium M about equal to a 3.0Ghz P4 (50% faster CPU about the same)
Pentium3's were super fast compared to P4's for CPU power, but just sucked b/c of the limited FSB/bandwidth.
I want Via (or someone) to make a mainstream mini itx mobo for a Pentium M. They currently have them for P4's, why wont they make one for a Pentium M.
Ok, I've seen mini boards for industrial use, but they were very expensive.
Pentium M processors had better be the worst overclocking processors ever. If not, then some Intel engineers screwed up. One of the ways that Intel made the Pentium M so low power is by making sure all parts of the CPU are as slow as possible while making sure it can still hit the target clock speed.
With most CPUs the engineers try to make the transistors as fast as possible so that they can crank the clockspeeds. With the Pentium M, they picked a realistic clock speed, and then slowed down the transistors as much as possible without making it to slow to run at that clockspeed.
That's why the Pentium M doesn't scale in speed very much within one process generation. The speeds don't increase much from the generation launch until the next process is rolled out.
With most CPUs the engineers try to make the transistors as fast as possible so that they can crank the clockspeeds. With the Pentium M, they picked a realistic clock speed, and then slowed down the transistors as much as possible without making it to slow to run at that clockspeed.
That's why the Pentium M doesn't scale in speed very much within one process generation. The speeds don't increase much from the generation launch until the next process is rolled out.
chrisf6969
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Yogi said:Pentium M processors had better be the worst overclocking processors ever. If not, then some Intel engineers screwed up. One of the ways that Intel made the Pentium M so low power is by making sure all parts of the CPU are as slow as possible while making sure it can still hit the target clock speed.
With most CPUs the engineers try to make the transistors as fast as possible so that they can crank the clockspeeds. With the Pentium M, they picked a realistic clock speed, and then slowed down the transistors as much as possible without making it to slow to run at that clockspeed.
That's why the Pentium M doesn't scale in speed very much within one process generation. The speeds don't increase much from the generation launch until the next process is rolled out.
And... you know this b/c you're an Electrical engineer?
It has to do with IPC.
Or how much work a CPU does per clock. They targeted a performance level and wattage level.
The pentium M is basically a Pentium3 (on steroids) with P4's prefetching+++, and its got the P4's Quadpumped bus.
When you have a high IPC cpu like the Pentium3, Athlon's, Pentium M, they cant clock as high. The PentiumM also has wattage/volt limits. If it was placed in a desktop board with more volts/wattage.... and some overclocking/FSB options. I'd bet we would see some 2.5Ghz clocks which would probably smash a P4 at 3.4Ghz+
Tell me, do you have any idea what the relation between IPC and clock speed really is?
IPC is not some magical number that is diametrically opposed to clock speed.
(The following is simplfied and I know I am not a total expert on these issues, but I think I can give a basic rundown of the technology.)
The basic way to increase IPC is to add more instruction units. Doing this requires adding more transistors, which provide certain limits to clock speed by generating more hear, but by itself, more instruction units don't really block clock speed much.
Other ways include providing larger memory address paths and faster access to memory, which can be done my faster system memory or more cache. These do not inherently limit clock speeds either.
The big variable that affects the relation between clock speed and IPC is pipeline length. Long pipelines allow work to be broken into smaller chunks, which in turn allows higher clock speeds. The problems with longer pipelines are twofold.
First is the problem of branch mispredictions. A CPU is most effective when it's pipeline stages are always full, instead of waiting around for work to do. When a processor is in the middle of doing one thing, and then has to change what it's doing on the fly, it looses valuable time as the stages of the pipeline are cleared and wait for the new instruction to move through the pipe. This is called a branch misprediction, because it happens when the CPU guesses incorrectly what it needs to do next. Branch mispredictions hurt long pipeline CPUs more than short pipeline CPUs. Better predition algorithms help avoid branch mispreditions, and more cache and faster memory help limit the damage that they cause by helping the CPU recover faster.
The problems with branch mispredictions explain several things you have probably noticed about Athlon and Pentium 4 performance. Firstly, P4s excel at tasks that are predictable and linear, such as media encoding, while Athlons are better at tasks where the next instruction is hard to guess, such as complicated math. Secondly, you have probably observed the reliance that the Pentium 4 architecture has on processor cache. The P4 needs the cache to help it recover from branch mispreditcions. That is why the early Netburst core Celerons were extremely weak, and why the P4 gains a lot of performance every time it gains cache, all else being equal (Williamette -> Northwood, P4EE).
The other problem with long pipelines is that they take a lot of transistors to do. More transistors = more cost, so in order to keep costs low, CPUs with long pipelines may have to use fewer instruction units, indirectly lowering IPC.
So IPC is based on the number of instruction units and some other smaller factors such as cache/fast memory access (which increases IPC) and branch mispredictions (which lower IPC)
Long pipelines are one trick engineers use to increase clock speeds, but the main thing that affects clock speed is the speed of the transistors. This is a no-brainer. The clock speed cannot be faster than the transistors can switch, or else errors will occur. Transistors can be made faster by process shrinks (that's why CPUs usually get faster after a process shrink) and though other tricks, such as strained silicon, and SOI.
In the Pentium M, the transistors are purposefully designed to be no faster than they need to be, because that allows the chip to use less power. That is why Pentium M processors won't overclock very well. It also may be why the C3 doesn't overclock well (Via hasn't been quite as open about this as Intel).
There you go. That was a long winded and rambling mess, so if you've actually read it, thank you. I am not an electrical engineer, although I am a CS major, I have 2 friends in electrical engineering, am rooming with a physicist, have read tons on CPU information over the years and have discussed CPU design with an ex-Intel senior engineer and a few AMD engineers. I know that I don't have anything near a perfect understanding of CPU engineering, so if anyone has anything to add or correct, feel free.
IPC is not some magical number that is diametrically opposed to clock speed.
(The following is simplfied and I know I am not a total expert on these issues, but I think I can give a basic rundown of the technology.)
The basic way to increase IPC is to add more instruction units. Doing this requires adding more transistors, which provide certain limits to clock speed by generating more hear, but by itself, more instruction units don't really block clock speed much.
Other ways include providing larger memory address paths and faster access to memory, which can be done my faster system memory or more cache. These do not inherently limit clock speeds either.
The big variable that affects the relation between clock speed and IPC is pipeline length. Long pipelines allow work to be broken into smaller chunks, which in turn allows higher clock speeds. The problems with longer pipelines are twofold.
First is the problem of branch mispredictions. A CPU is most effective when it's pipeline stages are always full, instead of waiting around for work to do. When a processor is in the middle of doing one thing, and then has to change what it's doing on the fly, it looses valuable time as the stages of the pipeline are cleared and wait for the new instruction to move through the pipe. This is called a branch misprediction, because it happens when the CPU guesses incorrectly what it needs to do next. Branch mispredictions hurt long pipeline CPUs more than short pipeline CPUs. Better predition algorithms help avoid branch mispreditions, and more cache and faster memory help limit the damage that they cause by helping the CPU recover faster.
The problems with branch mispredictions explain several things you have probably noticed about Athlon and Pentium 4 performance. Firstly, P4s excel at tasks that are predictable and linear, such as media encoding, while Athlons are better at tasks where the next instruction is hard to guess, such as complicated math. Secondly, you have probably observed the reliance that the Pentium 4 architecture has on processor cache. The P4 needs the cache to help it recover from branch mispreditcions. That is why the early Netburst core Celerons were extremely weak, and why the P4 gains a lot of performance every time it gains cache, all else being equal (Williamette -> Northwood, P4EE).
The other problem with long pipelines is that they take a lot of transistors to do. More transistors = more cost, so in order to keep costs low, CPUs with long pipelines may have to use fewer instruction units, indirectly lowering IPC.
So IPC is based on the number of instruction units and some other smaller factors such as cache/fast memory access (which increases IPC) and branch mispredictions (which lower IPC)
Long pipelines are one trick engineers use to increase clock speeds, but the main thing that affects clock speed is the speed of the transistors. This is a no-brainer. The clock speed cannot be faster than the transistors can switch, or else errors will occur. Transistors can be made faster by process shrinks (that's why CPUs usually get faster after a process shrink) and though other tricks, such as strained silicon, and SOI.
In the Pentium M, the transistors are purposefully designed to be no faster than they need to be, because that allows the chip to use less power. That is why Pentium M processors won't overclock very well. It also may be why the C3 doesn't overclock well (Via hasn't been quite as open about this as Intel).
There you go. That was a long winded and rambling mess, so if you've actually read it, thank you. I am not an electrical engineer, although I am a CS major, I have 2 friends in electrical engineering, am rooming with a physicist, have read tons on CPU information over the years and have discussed CPU design with an ex-Intel senior engineer and a few AMD engineers. I know that I don't have anything near a perfect understanding of CPU engineering, so if anyone has anything to add or correct, feel free.