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TSMC Details N4X Process

erek

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Nice, high-end 4nm finally

“While N4X offers significant performance enhancements compared to N4 and N4P, it continues to use the same SRAM, standard I/O, and other IPs as N4P, which enables chip designers to migrate their designs to N4X easily and cost effectively. Meanwhile, keeping in mind N4X's IP compatibility with N4P, it is logical to expect transistor density of N4X to be more or less in line with that of N4P. Though given the focus of this technology, expect chip designers to use this technology to get extreme performance rather than maximum transistor density and small chip dimensions.


TSMC claims that N4X has achieved its SPICE model performance targets, so customers can start using the technology today for their HPC designs that will enter production sometimes next year.


For TSMC, N4X is an important technology as HPC designs are expected to be the company's main revenue growth driver in the coming years. The contract maker of chips anticipates HPC to account for 40% of its revenue in 2030 followed by smartphones (30%) and automotive (15%) applications.”

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Source: https://www.anandtech.com/show/18875/tsmc-details-n4x-extreme-performance-at-minimum-leakage
 
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