• Some users have recently had their accounts hijacked. It seems that the now defunct EVGA forums might have compromised your password there and seems many are using the same PW here. We would suggest you UPDATE YOUR PASSWORD and TURN ON 2FA for your account here to further secure it. None of the compromised accounts had 2FA turned on.
    Once you have enabled 2FA, your account will be updated soon to show a badge, letting other members know that you use 2FA to protect your account. This should be beneficial for everyone that uses FSFT.

True 64 bit?

JAK

Weaksauce
Joined
Jul 13, 2005
Messages
68
Hi. I've been doing some research on how 64 bit works and I have a question. It seems to me that the IA-64 is the only 'true' 64 bit processor because x86-64 is just an extension of the 32bit instruction set and allows for 64bit wide integers,memory addresses,etc. My question is what makes the IA-64 a 'true' 64 bit processor. Is it something with the physical processor like registers,or is it something else? I was also wondering exactly how PAE works. I've read enough to know that it extends 32 bit processors,but how exactly does it do this? An article I read said that the processor enables extra address lines,is this correct? Thanks for your help.
 
As I understand it, IA-64 only handles 64-bit code. It has to emulate 32-Bit code, resulting in very poor 32-bit performance. X86-64 natively supports both 32-bit and 64-bit code.
 
x86 it an extension of 16 bit processor the 8086 developed in 1978. Do you say a pentium 3 is still a 16 bit processor? Of course not, a p3 can run 16 bit code, sure.. but it handles registers and memory 32 bits wide, thus us a 32 bit processor.

The itanium is developed from the ground up as a 64 bit processor. You gain a small edge in performance, but lose backward code compatibility with x86. This is really silly, as you lock out tons of code. The hit that a modern processor takes from running legacy code is very small, in the 5-10% range. Why give up all legacy code support for 5% more speed, that doesn't make sense.,, this is one of the reasons the itanium flopped.

If you are interested in the topic, go take some computer architecture courses at a college, they are a blast.
 
Hi. How exactly was the IA-64 built from the ground up as 64 bit? What makes it native 64 bit,is it something in the physical processor like a register size? I plan to take computer architecture courses in college,the topic fascinates me. Also,are there any books that you would recommend I read? I already have Code,I'm not done reading it,but I'm looking for any more books of that type that don't assume you already know about processors.
 
At the basic level, a processor runs on assembly. It is fed assembly by the computer to do stuff.

The assembly for a athlon of any kind, or a pentium of any kind, or a core2 duo of any kind still has all the basic commands of the 8086, a 30 year old processor. Of course new commands are constantly added (MMX, SSE, SSE2, yadda yadda), but they are added on top of the commands there. This means if you ever call a really old dos program that is using old 8086 commands, your computer will know how to run them.

A processor built from the ground up won't have those commands, it will just have the current commands you need. The less total commands you have, the less space you waste implementing the old ones.. each command your processor has takes up a certain amount of the physical chip.

A competing processor would also not have these old 8086 commands.. anything that isn't x86 compatible. For example, your nintendo wii processor, or your ps3 processor won't be able to run x86 commands, so it is considered a different architecture.

Register size is irevelant.. an itanium could have 256 bit wide registers.. or could the pentium 7. To the best of my knowledge, both the core2 and the athlon64 and the itanium all have 64 bit registers.. the reason why itaniums won't run x86 is because it doesn't have the necessary hardware to run them.

There is no magic thing that makes the itanium a "true 64" bit processor anymore than a core2.. the difference is it can run different assembly commands and isn't tied down to being 8086 compatible.

Did that make any sense?
 
From an ars tech article

All of this decoding and translation hardware takes up a lot of transistors. MDR estimates that close to 40% of the P6's transistor budget is spent on x86 legacy support.

So if a chip is going to use X power and be Y mm squared.. a pentium can say only have 60 million transisters dedicated to new stuff, its stuck with 40 million for all the old crap. An itanium can dedicate all 100 million transisters to running new crap.

So in theory an itanium would be able to run faster.. but people wouldn't want to give up their existing programs, so not much support.

This site has some crap

http://arstechnica.com/articles/paedia/cpu/pentium-1.ars/7
 
As I understand it, IA-64 only handles 64-bit code. It has to emulate 32-Bit code, resulting in very poor 32-bit performance. X86-64 natively supports both 32-bit and 64-bit code.

This is not entirely true.
The poor performance was in x86 code. Not because it was 32-bit, but because it was not the native modus operandi of the CPU. Which was mostly solved by using a fast JIT-compiler in XP sp2.
Not all 32-bit code is necessarily x86 (and x86 is not necessarily 32-bit, there are also 16-bit and 64-bit versions, 32-bit was already an extension of the original 8086 instructionset).

x86-64 simply has a native 32-bit mode.
PowerPC is another CPU that can run both 32-bit and 64-bit code with no performance issues.
Itanium was just never designed to run x86 code efficiently, and there is no 32-bit variation of the native instructionset, as there is no need for one. After all, there is no legacy code for Itanium.
 
Hi. How exactly was the IA-64 built from the ground up as 64 bit? What makes it native 64 bit,is it something in the physical processor like a register size?

The jury is still out on that one.
There are basically four components that could possibly determine the 'width' of the processor (as in nr of bits):
1) Instruction size.
2) Data bus size.
3) Register size (but more specifically the execution units that process the data in these registers).
4) Addressing size.

But let's see the problems here:
1) Well for x86 this doesn't make sense, as the instruction length is variable. Instructions can be anything from 1 byte up to about 15 bytes in length. Most other CPUs have a fixed length, which used to be 16-bit in the 16-bit era (eg Motorola 68000) and 32-bit in the 32-bit era (eg Motorola/IBM PowerPC). But in the 32-bit era instructionsets have pretty much reached full maturity... A 64-bit processor doesn't require more instructions than a 32-bit one, therefore you don't need more bits to encode these instructions. So you'll find that most 64-bit processors still use 32-bit instructionsets. In other applications, eg mobile phones, they tend to use 16-bit instructionsets for 32-bit processors, to save valuable memory.
So basically instruction size can be disregarded these days.

2) This used to be a pretty good measure... Basically "How many bits can I read/write to memory in a single operation". But some CPUs broke the rule that their data bus was equal to the rest of the processing units. For example, an Intel 8088 was basically a 16-bit processor, like the 8086. But it had an 8-bit data bus.
Or the 386SX which was basically the same CPU as a 386DX, but with a 16-bit bus instead of 32-bit.
To make things even more complicated... the Pentium was a 32-bit CPU, but it was superscalar, so it had two 32-bit pipelines instead of one... Which meant they also made the data bus 64-bit instead of 32-bit.

3) This may be the most accurate measure... Although even here there are exceptions.
For example, the Motorola 68000 was designed with 32-bit registers, but the databus and actual execution backend were 16-bit, so it was considered a 16-bit processor anyway. 32-bit operations were translated to two 16-bit operations internally. They did this so they could make later versions truly 32-bit without having to redesign the instructionset.
To make things even more complicated, MMX added 64-bit registers to what were in most other aspects 32-bit processors, and SSE even added 128-bit registers. But these were used to process 32-bit or smaller data in parallel... so erm... well nevermind registersize either.

4) This has never been a very good measure, since usually the address spaces were larger than the rest, because otherwise things would be too cramped.

So basically, there are some CPUs that are easy to judge, because they have equal width on all 4 aspects... But most CPUs use at least two different widths for various components... which means it depends on what aspect of the CPU you're talking about... In some aspects it may be 32-bit, in others it may be 64-bit.

I think it's not very useful to discuss what is a 'native' 64-bit processor, or what is 'from the ground up'.
For example, Pentium 4 was originally a 32-bit processor, but it was later extended to 64-bit. However, compare it to the K8 or Core2 where 64-bit wasn't added as an 'afterthought', and you can't tell the difference really. In fact, in some cases the P4 actually gets more of a performance boost out of 64-bit than the others...
Just like how Barcelona will be a 'native' quadcore, but still it struggles to beat the double dualcore designs of Intel.
'Native' is a useless term, it doesn't guarantee that it will work better than something that was originally started as something else, but then modified.

What *is* interesting about IA-64 though, is that it's a CPU-architecture started from a clean slate, so there is no legacy in the design. But that has little to do with the fact that it's 64-bit. Being 64-bit is just a result of the era in which it was designed. Going 32-bit would have been a silly move, considering the need for 64-bit today and in the near future.
Had it been designed 10 years earlier, then it probably would have been 32-bit. Perhaps 10 years later it would be 128-bit... who knows.
 
At the basic level, a processor runs on assembly. It is fed assembly by the computer to do stuff.

Well, technically, assembly is a human-readable representation of machinecode (eg, opcode 90h has the mnemonic 'nop' in x86 assembly).
The CPU runs machinecode, the actual binary stuff.
 
Assembly has a direct mapping to machine code, so it is OK to think of a processor as running assembly. Have 20 lines of assembly.. that will be 20 lines of machine code when it is read.

Yes the wording I used wasn't entirely accurate, but the point was there. The main thing that itanium does is NOT follow x86... it's not more or less 64 bit than any other processor.
 
Assembly has a direct mapping to machine code

Not really.
There are often multiple ways to encode the same instruction, at least, on x86.
Sure, it's a more direct mapping than eg C, but still it's not entirely 1:1.
 
Not really.
There are often multiple ways to encode the same instruction, at least, on x86.
Sure, it's a more direct mapping than eg C, but still it's not entirely 1:1.

How exactly does this influence his question about a processor being 64 bit or not.... stay on topic.
 
How exactly does this influence his question about a processor being 64 bit or not.... stay on topic.

You brought it up, not me. I just corrected it a bit.
Now stop nagging. If there's anything off-topic, it's nagging about how something is off-topic.
Let's just hear if the OP thinks his question is answered, or if he wants some more things cleared up.
 
Hi. Thanks for all of the replies,they really helped me gain a better understanding. Are there any books anyone would recommend to teach me about processor design that assume you don't know much from the start? The only book I have like this so far is Code.
 
You brought it up, not me. I just corrected it a bit.
Now stop nagging. If there's anything off-topic, it's nagging about how something is off-topic.
Let's just hear if the OP thinks his question is answered, or if he wants some more things cleared up.

How about nagging about nagging about something that is off topic? :p
 
Back
Top