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wrangler said:Didn't AMD just buy some fancy superfast cache memory company and wasn't there some talk about 2 and 4 meg cache per core? I would think 4 meg per core and integrated DDR 800 (possibly 1000) would take up a lot of slack and equalize things while they roll out the next big thing.
What hasn't been talked about too much is Merom's 4MB on-die L2 cache. Merom's cache, like Yonah's, is entirely shared between the two cores and can be dynamically resized to suit the needs of each individual core. The increase in L2 cache size from Yonah's 2MB now explains why Yonah had a higher L2 access latency (14-cycles) compared to its predecessors; the higher latency L2 is actually because Yonah makes use of Merom's cache, it simply is a 2MB version of it.
NAND Flash to Reduce Application Load Times
During Sean Maloney's mobility keynote, another element of the Santa Rosa platform was demonstrated - a technology called Robson. Robson combines NAND flash with some caching algorithms to help speed up system boot time and application startup time. Basically data gets prefetched and cached into some local NAND flash, which makes accessing it a lot faster (and lower power) than going to a slow, mechanical hard disk.
I'd say keep with their cache scheme, it is very fine tuned, where Intel shares the same copy of instructions on each level AMD dosn't and the 128KB+xMB work together better, combined with the short pipeline and better local branch prediction. I don't see a reason why, adding more cache increases the latency. I think AMD should put a focus on having the abillity of opening a long stage pipeline for media and work to create a specialized instruction set meant for processing ingame physics and AI.freeloader1969 said:What does everyone think AMD will have to do to be competitive against Conroe? Some suggestions would be great.
Here's what I was thinking. Take the K8L (with extra floating point units), add a 4mb L2 cache (2mb per core), possibly some L3 cache, and if it's even possible to do in a few months, add 2 more stages to the Athlon 64 core.
I'm in no way a CPU engineer, so go easy on me!![]()
My logic was that the extra stages may help the existing arcitecture scale over 3ghz. I realize the L3 cache is wishful thinking due to 90nm fabrication. Maybe at 65nm we'll see some. I also don't believe that the switch to DDR2 is going to make that much of a difference in current performance. A64's have never been bandwidth hungry anyhow.
Thoughts, suggestions?
wrangler said:Didn't AMD just buy some fancy superfast cache memory company and wasn't there some talk about 2 and 4 meg cache per core? I would think 4 meg per core and integrated DDR 800 (possibly 1000) would take up a lot of slack and equalize things while they roll out the next big thing.
josh_1413 said:Is the K8L going to be released on the AM2 socket?
Obi_Kwiet said:I would love to see games actually start straining CPUs.
freeloader1969 said:Try and stay on topic guys. I don't think we'll see nano machine guns anytime soon
needmorecarnitine...If you don't have any ideas, then don't contribute. Just skip over this thread. I don't think there's a single CPU engineer on this whole board, atleast no one has ever claimed to be.
Some interesting ideas so far. We have extra cache, stronger IPC, 1 pass vector processing and more FP units. Sounds similar to what Intel has done, minus the FP units.
morfinx said:Hey I'm a CPU EngineerWell, I probably don't really count since I'm still in grad school!
I've read that AMD should be releasing a completely new architecture in 2007. I don't think the current architecture will best Intel's new architecture.
josh_1413 said:Whatever. Yeah, AMD has been working on a new architecture for the past 1-2 years to make sure its slower than Conroe.
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USMC2Hard4U said:AMD needs better support and speed for their SSE, SSE2, SSE3 Instruction sets. Since everything is coded for this now... its where all the Conroe's Media performance comes from.
morfinx said:Josh, I think you misread my post. I said I think AMD's CURRENT architecture (K7) may not be able to catch up with Intel's new architecture. I was not talking about AMD's (yet to be announced) new architecture, which I'm sure will be a force to be reckoned with.
I'm just as big of an AMD fan-boy as anyone here. In fact one of the big reasons why I chose to go to grad school at my particular school is that I know AMD recruits most of its new engineers from several schools, this being one of them.
josh_1413 said:Is the K8L going to be released on the AM2 socket?
robberbaron said:It's being made with servers in mind AFAIK. I would imagine if yields on it are good, they might migrate it from Socket F to AM2. But it's gonna contain a rather large die. Only thing I know for sure is Socket F.
I heard it would be around the same timeframe as AM2.josh_1413 said:When is socket F coming out?
Mega2 said:They should come out with dd3, quad core, 4 individual memory controller let you maximize the low low lantency of having all banks filled with low low lantecy at fast fast transfer rate maybe 10gig/sec+ at 4gig or more with pi <20 move to 45nm too
[LYL]Homer said:Given that the A64 does more per clock cycle than the P4 is it possible we'll see a future chip with even fewer mhz, something like a 1ghz chip that could beat Conroe?
morfinx said:Hey I'm a CPU EngineerWell, I probably don't really count since I'm still in grad school!
I've read that AMD should be releasing a completely new architecture in 2007. I don't think the current architecture will best Intel's new architecture.
covertclocker said:Well, reading a post from Ecplise a little while back, GDDR3 has disgustingly high latencies. Hence the reason why its not used as system ram yet.
Serge84 said:The one in all Thrend. The Conroe debunk thrends is all ya need for your conroe needs. Just wait until real world final product performance issue results come out. That will really make us AMD fan boys laugh at intel for trying to cheat on performance with a shit load of L2 for a large performance gane. No L2 see a FX60 F up a conroe. lol This HYPE will get old real fast.
Serge84 said:The one in all Thrend. The Conroe debunk thrends is all ya need for your conroe needs. Just wait until real world final product performance issue results come out. That will really make us AMD fan boys laugh at intel for trying to cheat on performance with a shit load of L2 for a large performance gane. No L2 see a FX60 F up a conroe. lol This HYPE will get old real fast.
Serge84 said:The Conroe benchmarks I have seen were very fishy at best. The 'testing' was so controlled that I don't feel the results have any credibility. At best a smoke screen hoping to delay purchases. If the test had any credibility the testers would have been able to
look inside the machines, check bios settings etc. Anyone can rig a test to produce just about any results. Let them spend a few days on the machines, look inside, see what drivers are being used etc.
Call me when they do that and then I'll beleave the shit I see. I'm pritty sure that has ya really going there.
FreiDOg said:I had no idea FreeCableGuy and VictorWang at XtremeSystems were intel shills.
Uh... just for the record, Intel has had more failures than AMD has had success and Intel still has more money to burn than anyone but that Gates boy...Serge84 said:Intel has had 2 years of failures.
Itanic.
Pentium IV 4000 recalled.
snip
Serge84 said:The K8 A64 is 3 years old and a 3 year old arc. What do ya think they been doing for the past 3 years? Nothing would be wrong and AM2 Enhanced K8's are not one of them. The new arc is going to be as big as a P4 going to Conroe. K9's will be one hell of a arc for AMD. All they did with the Enhanced K8's is perfect 90nm tech. What intel could only dream of in eff and low power use with 90nm's. K9's arn't only a change from 90nm to 65nm. But a arc change they been working on for as long as 90nm has been around.
They knew 65nm's was coming and they where going to include it into their new arc as soon as they could when IBM found out how to do it. Early AM2's arn't made to impress anybody, they are made for ppl that don't want a cpu that runs more then 125w/175w *Cough* Intel. *Cough* AMD knows they are behind but again what can 90nm do agenst a 65nm arc. 65nm isn't just a process change but it allows for higher clocks with lower heat and lower power use. Also allows a smaller area to put the die on that can perform just as good as a larger die at 90nm's. 65nms is a good amount smaller then a 90nm die and if made just as large can be even faster but not alone it just sets a new bar really cus you can fit more stuff into a smaller area, you can add more of something with out loseing performance. Why intels L2 is getting so damn big now is all the reason of 65nm's, ya could boot with no memory at all if ya wanted to with that much L2. =P J/K
Intel had to change to that 65nm to beat AMD. Still wasn't enough then they thought of conroe a new arc on 65nm's. AMD will do the same thing when moving to 65nm. And it will be even more eff then a intel knowing how AMD is. AMD knows the K8's arn't good enough any more. Now its time to move to K9's they once said when they anounced that new arc on 65nm's. From one AMD fan to another. AMD woot woot woot. Intel fans shouldn't even be looking for posts like this in the 1st place just to get mad at. I mean its the truth ant it. AMD wins the 6 months then intel after that then amd and so on over and over bla bla bla. Besides I'd rather have a eff 67w or 35w X2 cpu then one that runs 100w or 200w like a intel dual core.
$BangforThe$ said:I will give you one thing . Your glass is diffantly half full