RAMBUS vindicated.

CCUABIDExORxDIE said:
no one ever should have bought RDRAM! period!

Excuse me?
Why should I have gone with DDR, just becuase it was cheaper?

waste of money...ddr was just as good..and for alot cheaper. AMD knew this and didnt utilized RDRAM.

Those 4 years that RDRAM has been runing in my rig sure dosn't seem like a waste to me? :)

yea it is. so? point being?

I'm a referring to my point about RDRAM and that it too would evolve..like it did from PC600->PC800->PC1066->PC1200....

you can buy RDRAM today...but itll cost you an arm and a leg and you wont be able to use it in either a LGA775 rig or AMD rig of any kind.

And I refer to my point about supply and demand.

and the last part is debateable ;)

Eh? *L*

Terra - Thanks for using arguments :) (Not a joke)
 
Terra said:
Please look at post #48...lets stick with the facts okay? :)



And again, why would I make RAM a bottleneck in my system?



Back in those days the P4 2.4Ghz and the XP+ 2400 where a lot closer than Intel and AMD are today...(disregarding the Conroe)
Anandtech - AMD Athlon XP 2600/2400+ Date: August 21st, 2002

Terra...
yes, lets stick with the facts. 1200 RDRAM didn't make it out to market.

Ram isn't a bottleneck, especially with DC DDR.

And yes, they were close, BUT that P4 system cost probably 20% more (at least) than the AMD one. Like I said, AMD was winning overall.
 
Terra said:
Excuse me?
Why should I have gone with DDR, just becuase it was cheaper? better performance too



I'm a referring to my point about RDRAM and that it too would evolve..like it did from PC600->PC800->PC1066->PC1200.... it would be interesting to see what would have happened had rambus stayed in the market. i do believe that even if none of the price fixing crap and whatnot had happened, ddr would have won anyway


And I refer to my point about supply and demand. supply is low.. and demand is even lower. no reason for prices to be sky high this day and age
^^^
 
(cf)Eclipse said:
yes, it is good bandwidth. but there's more to things to performance than just bandwidth...

Agreed, I have in an earlier post mentioned some of the benfits of the RDRAM design that I liked.


right... cause we all remember pc3200 modules being for sale in late '02. get your timeline straight before trying to cite it.

Late 2002?
You got a more spefic date, not trying to be an ass, but perhaps the timeline was a bith different here in Denmark?


nice math. dual channel ddr actually needs to be 300mhz to get a theoretical bandwidth of 9.6ghz.. which is a 50% oc. while this is even more in rdram's favor for bandwidth, it's always fun arguing numbers with someone who doesn't multiply correctly ;)

Wooops, my bad!

ok, as i said, the cpu is blind to the ram. to get a certain amount of work done, it needs the data to do it. regardless of how the cpu is set up internally, it'll still need the exact same amount of data to do the exact same amount of work.
the P4's architecture is really designed for high cpu clock speeds. check out the difference between single and dual channel ddr.. surprisingly small? guess bandwidth means jack after all

I know that Intel wanted "Netburst" to scale up to ~10Ghz.
That didn't happen.
But I always thought that is was more due to that the later revison of Northwoods din't have a FSB and chipsets that wouldn't go over 6.4GB/s...unless you OC'ed?
i call your attention to an old review that compares a few different things:

dual channel pc1066
dual channel ddr400
dual channel ddr266
single channel ddr333
http://www.extremetech.com/article2/0,1697,1156952,00.asp
looks like ddr trounces rdram for media encoding, which is odd because of how rdram is set up, streaming data should be it's strong point

Test: MovieMaker XP
Differences are ~1%?(Not couting the VIA P4B)
Now you have me confused? *L*

2 things to note:
1. surprisingly small spread between all rigs, considering how focused you seem to be on bandwidth.
2. ddr400 wins the majority of the tests against what was available at the time for testing: dual channel pc1066 rdram

Yeah, but the PC120= RDRAM promised lower latencies ect.

"but wait!" you might chime in, "it's not quad channel pc1200". this is indeed true. let's look at a review that shows the actual performance of this setup :p
but wait! from what i can tell, the board never actually made it to market. if it did, the only site that reviewed it was Tom's, and i have good reason not to trust any of their data from that time period.

I agree...Tom's hardware is not a site I would use either *L*

so some more things to point out:
read this [H] article. despite having a lot more bandwidth on hand, the dual channel pc1066 rdram rig barely does better than it's single channel ddr333 counterpart (compare the abit board to the i850E)
http://www.hardocp.com/article.html?art=MzUyLDEsLGhlbnRodXNpYXN0

Yeah, but they do also state stuff like this:
"Under Content Creation, the RAMBUS systems perform slightly better than their DDR counterparts. Our 8IHXP at stock speed edges out slightly ahead of the DDR systems and even the Asus P4T533. When overclocked it doesn’t take the lead as much as one would think, though. Telling us it’s not so much CPU power that wins this benchmark as it is memory bandwidth."

&

"Again, in content creation tests we see the RDRAM solutions perform better than DDR333. When our 8IHXP was overclocked, there are just no comparisons to it in our graph"


And when we turn to gaming:


"Here we see the 8IHXP perform extremely well. Even slightly outpacing the Asus P4T533 in one test and just right under it in the other. When overclocked we can see how much of an increase raising the speed raises the memory bandwidth. The 8IHXP is definitely no slouch. So even though you cannot access memory timings, it seems Gigabyte has set them aggressively."

&

"With the Det. 40.41 Beta Driver the performance is just flat out incredible! The Gigabyte 8IHXP shows no problem accelerating this 3D benchmark. When overclocked we are reaching some very high speeds for a GF4 Ti 4600."<<---the same Card I got in preroder for my P4T-E

&

"Again, we see the 8IHXP is un-hurdled when it comes to 3D games. Quake3 shows a predictable linear increase in FPS with CPU speed, which is to say it’s good to use to see if a motherboard is degrading performance or not, and the 8IHXP is certainly not."

&

"Considering Comanche 4 is very CPU dependent, it is impressive to see these results for sure."

Now I would have love to have seen DDR400 vs RDRAM PC1200.

not sure if i really want to go over this again. pc3200 competed against pc1066, and quad channel really didn't make it to market.

No, i remember i heard that RDRAM was "dying" and I was like "WFT?"
In my view the RDRAM prommised to scale faster and beter than DDR RAM.

exactly. enthusiasts have proven time and time again that they'll pay out the ass for better performance. if rdram really was better, why did it not beat ddr in terms of sales and success?

There is always the exception for the rule.
DRAM got a really bad hype back in those days.
And AFAIK it was the enthusiasts that got it.
Byt hey, just look at this thread...people some people even hate RDRAM today...

actually, i'm 99% certain that ddr2-800 is the standard. 12.4gb/s and lower access latency ftw :D

I am not dening that DDR won the PR/sales market falyout.
I was just pointing out that RDRAM has some nifty features and a good looking future on paper.
But no sale = no goody technology...

it's honestly surprisingly hard to make memory a bottleneck in the system, unless you don't have enough

But the RAM speed does have an influence right...why else go to DDR-II?

Terra - Thanks for using arguments :) (Not a joke)
 
lopoetve said:
true, but someone suing over mcdonalds making them fat, or suing because they smoked for years and got sick, or suing because they broke into someone's house and got hurt breaking in... etc.

Ooookaaaay...
And you peeps from the US are content with that?
Why don't you chage the system if it's broken?

Terra - Thanks for using arguments :) (not a joke)
 
pxc said:
Your chart already has those figures. Why would you post it if you didn't understand why both clocks and time were included?

For example, DDR400 (200MHz DDR) with a 5 cycle transaction time = 5 * 1/200MHz = 25ns. Same with a 7 cycle transaction time: 7 * 1/200MHz = 35ns. Do those numbers look familar yet?

RDRAM 1200 with a 2-7 clock transaction takes 10-35ns (in RAMBUS speak, the 30-32 "timing bin", a suffix after the RDRAM 1200 module part number). Unfortunately, a cache line fill requires twice as many quad channel 64-bit interface RDRAM transactions as a dual channel 128-bit DDR interface, which makes RDRAM look and perform downright bad. Why isn't RDRAM as fast as DDR could be at 1200MHz (ignoring the bus width)? The packet based transfer method introduces additional latencies.

BTW, PC800 latency is horrible. It's around 67.5ns for the first access, much, much worse than DDR1. Dual channel PC800 is inferior in every way to single channel PC3200 except theoretical peak bandwidth which are equal. See how that worked out in real life applications.

I'm all for loving your hardware and all, but RDRAM was a failure after dual channel DDR was supported. And for you to pick on a virtually unused version of it as proof of how good it was is really stretching it.

You got any link to software that can measure lantecy?
Not that I don't belive, you would just like to try and and have a closer look for myself? :)
I'll get back to you other points later, this thread is taking all my time right now, and I am only human ;) *L* (promise!!!)

Terra - Thanks for using arguments :) (Not a joke)
 
i don't have the time to reply to all of that, as i have to go to class

note 1: nforce2's announcement that it would support ddr400 in july of '02
http://www.nvidia.com/object/IO_20020715_4376.html
and that chipset was launched in december of '02?

samsung started sampling ddr400 chips back in march of '02.. i think the first modules that were sold spec'ed to ddr400 came about in Q2:
http://www.theregister.co.uk/2002/03/04/samsung_preps_400mhz_ddr_launch/


about intel.. again, cpu mhz has nothing to do with how much bandwidth the core needs, but instead, how MUCH WORK the cpu does in a given time is what determines how fast data needs to be fed (obviously the workload is important too, but assuming an identical workload for all comparisons. ;))

for the extremetech article, it's the Via P4B that caught my eye. i might have missed it, but any reason to count it out?

[H] does indeed point out the pros and cons of each. it's why they're not biased :D
however, looking at the benchmarks, the difference is pretty meager most of the time, though it is normally in rdram's favor :p

for your last comment, contrary to common belief, ddr2 actually provides lower access latencies. while the timings themselves may be higher, the mhz makes up for it.. and has the side effect of adding a bit more bandwidth. :p


<OT>the US's judicial system is pretty heavily abused these days</OT>


edit: for latency testing, i like sciencemark:
http://www.sciencemark.org/download.html
sisoft sandra unbuffered memory bench is also a pretty good look at real-world memory performance
 
(cf)Eclipse said:
for the extremetech article, it's the Via P4B that caught my eye. i might have missed it, but any reason to count it out?

The graph states:
Smaller is better ;)

Terra...
 
Here goes:
ScienceMark 2.0 Build 21MAR05

PUBLIC FINAL VERSION

Authors:

Alexander Goodrich, B.S. (Computer Science)

Tim Wilkens, B.S., M.S., Ph.D. (Physics)

Sean Stanek, B.S. (Computer Science)

Webmaster and special thanks to:

Thorsten Wolf (http://www.sciencemark.de)



Detecting processor...

GenuineIntel

Intel(R) Pentium(R) 4 CPU 2.40GHz

2410.670654 MHz

Intel Streaming SIMD (SSE) processor instructions supported.

Intel Streaming SIMD 2 (SSE2) processor instructions supported.

Hyperthreading Technology (HTT) supported.

- 1 logic processors per physical processor.



Ready to execute._

L1 : Testing over 2048 bytes_

L1 Method [ 0]: 10932.45 MB/s_

L1 Method [ 1]: 11997.08 MB/s_

L1 Method [ 2]: 3537.75 MB/s_

L1 Method [ 3]: 9834.43 MB/s_

L1 Method [ 4]: ISA not supported._

L1 Method [ 5]: Core not appropriate._

L1 Method [ 6]: 14017.64 MB/s_

L1 Method [ 7]: Core not appropriate._

L1 Method [ 8]: 14086.84 MB/s_

L1 Method [ 9]: Core not appropriate._

L1 Method [10]: Core not appropriate._

L1 Method [11]: Core not appropriate._

L1 Method [12]: Core not appropriate._

L1 Method [13]: Core not appropriate._

L2 : Testing over 16384 bytes_

L2 Method [ 0]: 12132.41 MB/s_

L2 Method [ 1]: 14855.35 MB/s_

L2 Method [ 2]: 3357.17 MB/s_

L2 Method [ 3]: 10367.08 MB/s_

L2 Method [ 4]: ISA not supported._

L2 Method [ 5]: Core not appropriate._

L2 Method [ 6]: 15095.92 MB/s_

L2 Method [ 7]: Core not appropriate._

L2 Method [ 8]: 15075.58 MB/s_

L2 Method [ 9]: Core not appropriate._

L2 Method [10]: Core not appropriate._

L2 Method [11]: Core not appropriate._

L2 Method [12]: Core not appropriate._

L2 Method [13]: Core not appropriate._

Mem: Testing over 16777216 bytes_

Mem Method [ 0]: 1448.30 MB/s_

Mem Method [ 1]: 1463.13 MB/s_

Mem Method [ 2]: 1404.20 MB/s_

Mem Method [ 3]: 1453.66 MB/s_

Mem Method [ 4]: -1.00 MB/s_

Mem Method [ 5]: 1993.77 MB/s_

Mem Method [ 6]: 2127.14 MB/s_

Mem Method [ 7]: 2131.72 MB/s_

Mem Method [ 8]: 2168.78 MB/s_

Mem Method [ 9]: 2103.78 MB/s_

Mem Method [10]: 1951.66 MB/s_

Mem Method [11]: 2106.28 MB/s_

Mem Method [12]: 1955.82 MB/s_

Mem Method [13]: 2064.37 MB/s_

Testing cache latency..._

4 8 16 32 64 128 256 512

4096 2 2 2 2 2 2 2 2

8192 2 2 2 2 3 3 2 2

16384 2 2 4 9 16 14 13 13

32768 2 2 5 10 17 16 16 16

65536 2 2 5 10 17 25 17 18

131072 2 2 4 11 18 18 18 19

262144 2 2 4 11 18 19 19 21

524288 3 4 13 13 24 34 35 41

1048576 6 12 25 46 83 384 389 387

2097152 6 12 25 47 83 380 385 389

4194304 6 12 25 46 82 384 377 389

8388608 6 12 26 46 82 375 367 379

16777216 6 12 26 47 168 375 376 371

L1 BW: 14086.84 MB/s

L2 BW: 15095.92 MB/s

Mem BW: 2168.78 MB/s

L1 Latency: 2 cycles / 0.83 ns / 32 byte stride

L2 Latency: 2 cycles / 0.83 ns / 4 byte stride

L2 Latency: 4 cycles / 1.66 ns / 16 byte stride

L2 Latency: 18 cycles / 7.47 ns / 64 byte stride

L2 Latency: 19 cycles / 7.88 ns / 256 byte stride

L2 Latency: 21 cycles / 8.71 ns / 512 byte stride

Mem Latency: 6 cycles / 2.49 ns / 4 byte stride

Mem Latency: 26 cycles / 10.37 ns / 16 byte stride

Mem Latency: 168 cycles / 34.02 ns / 64 byte stride

Mem Latency: 376 cycles / 156.39 ns / 256 byte stride

Mem Latency: 371 cycles / 161.37 ns / 512 byte stride

Finished testing latency._

Terra...
 
Terra said:
Ooookaaaay...
And you peeps from the US are content with that?
Why don't you chage the system if it's broken?

Terra - Thanks for using arguments :) (not a joke)

Yeah, right >_< It'll never change
 
lopoetve said:
Yeah, right >_< It'll never change
The problem isn't so much the system... It's that people don't realize how much power they really do have, so an insufficient number of people exercise that power. It does work sometimes, though, like the recall election that got Schwartzenneger into power as California's governor.

I think there's enough geeks here to kick Rambus's ass in court. :-P
 
I used to be in the anti-Rambus crowd, but I found this thread at Ars, and if you read it through, there's some convincing arguments that show how Rambus got raped.

They came up with many of the principles used in DDR, like data transfer at the rise and fall of the clock. They had this stuff when people were still using SIMMs, and the JEDEC members laughed and told them it would work. Rambus wanted a measely 1.5% in royalties...and this would add $15 to $1,000 worth of RDRAM. Rambus had patented the technology and was willing to work with JEDEC, but they still got laughed at. Rambus eventually leave JEDEC, and low and behold, the DDR standard magically appears using technology invented AND patented by Rambus. Now it's been made an 'open' standard.

It'd be one thing if Rambus hadn't patented this stuff prior to joining JEDEC, but they did.
 
Master [H] said:
I used to be in the anti-Rambus crowd, but I found this thread at Ars, and if you read it through, there's some convincing arguments that show how Rambus got raped.

They came up with many of the principles used in DDR, like data transfer at the rise and fall of the clock. They had this stuff when people were still using SIMMs, and the JEDEC members laughed and told them it would work. Rambus wanted a measely 1.5% in royalties...and this would add $15 to $1,000 worth of RDRAM. Rambus had patented the technology and was willing to work with JEDEC, but they still got laughed at. Rambus eventually leave JEDEC, and low and behold, the DDR standard magically appears using technology invented AND patented by Rambus. Now it's been made an 'open' standard.

It'd be one thing if Rambus hadn't patented this stuff prior to joining JEDEC, but they did.

thanks for the link! :)
This part I found VERY interesting:

First off, Rambus doesn’t claim they invented DDR, or DDR2, or even SDRAM. What they invented were technologies that are used in those memory types. In Rambus’ ‘898 patent application, which was filed in 1991 before they ever set foot in JEDEC, they described 11 separate technologies for use in high speed synchronous memory. Remember, this was at a time when EDO and FPM were just coming out as standards.

The 11 inventions were:

a) Highly Packetized/Multiplexed Bus
b) Programmable Burst Length
c) Programmable CAS latency
d) Externally supplied Reference Voltage
e) Two Bank Design
f) Source Synchronous Clocking
g) Low voltage swing signaling
h) Dual clock edge
i) On-chip PLL/DLL

These had never been used before in high speed memory systems. Because there was more than one identifiable invention (remember, this was Rambus’ first ever patent application) the patent office said, pick one invention, and file the others as separate inventions later. Rambus picked a, and wrote claims that described how it is implemented or used. In other words, the description of that patent, and all of the divisional/continuation patents have the same description of the 11 inventions, but what was patented or “claimed” is only one of them. But Rambus still gets the benefit of the 1991 filing date on the later applications, because that is when they told the patent office about the inventions.

Terra - I might not have been so wrong as some people thought....
 
Master [H] said:
I used to be in the anti-Rambus crowd, but I found this thread at Ars, and if you read it through, there's some convincing arguments that show how Rambus got raped.
And unlike people who get raped, Rambus deserved it. :p

Look at what the Rambus pumpers are yakking about it getting cleared for: not disclosing pending patents. Sure, there's no penalty for not doing that, but it didn't stop the Rambus from amending their submarine patents or the failure to stop any IP issues while Rambus attended JEDEC. Several Rambus patents are very shady, but apparantly not illegal. Score one for the crooks! :rolleyes:

Simply, Rambus burned the open JEDEC standards for SDRAM and the "cartel" flamed Rambus right back. But I guess it's just a case of "poor Rambus" according to a few. Thanks for reminding me of Rambus. I'm definitely scratching the PS3 off the consideration list since I don't want to support those crooks.

I hope Hynix can do something on appeal.
 
Terra said:
thanks for the link! :)
This part I found VERY interesting:
That's the problem with submarine patents. The original filing was made in 1990, but patents were not granted until many years later. The original claim is abandoned, and it's "updated" with new claims but gets to keep the original date. :rolleyes: S-C-A-M

See pages 10-11 for the anatomy of the Rambus '898 submarine scam: http://opensource.mit.edu/papers/conference/preso-graham.pdf

edit: I may as well copy it here...
The Threat from Submarine Patents: The Rambus, Inc. “Synchronous Memory Device” Litigation

&#56256;&#56473;This application is a divisional of application Ser. No. 08/710574, filed Sep. 19, 1996, now abandoned,
&#56256;&#56473;which is a continuation of application Ser. No. 08/469,490 filed Jun. 6, 1995, now abandoned,
&#56256;&#56473;which is a continuation of application Ser. No. 07/847,961 filed Mar. 5, 1992, now abandoned,
&#56256;&#56473;which is a divisional of application Ser. No. 07/510,898 filed Apr. 18, 1990 now abandoned.
Yeah, several of those were filed during the time Rambus attended JEDEC .
 
pxc said:
And unlike people who get raped, Rambus deserved it. :p

Not according to that Patent jugde?
Wich states a whole different story than "Redbeard" ( Official Corsair Rep.) told.

Look at what the Rambus pumpers are yakking about it getting cleared for: not disclosing pending patents. Sure, there's no penalty for not doing that, but it didn't stop the Rambus from amending their submarine patents or the failure to stop any IP issues while Rambus attended JEDEC. Several Rambus patents are very shady, but apparantly not illegal. Score one for the crooks! :rolleyes:

Did you read the link?
Dosn't say what you are saying?

Simply, Rambus burned the open JEDEC standards for SDRAM and the "cartel" flamed Rambus right back. But I guess it's just a case of "poor Rambus" according to a few. Thanks for reminding me of Rambus. I'm definitely scratching the PS3 off the consideration list since I don't want to support those crooks.

Like the RAM-plant that burned? :rolleyes:


I hope Hynix can do something on appeal.

I hope the yget slaped x 2(double up in damagges if they appeal)

Terra - I got a 350 page document to read now :eek: *L*
 
BTW pxc, did you have time to look at my lantecy benchmark? :)
Does that corrospond with the numbers you used before?
And does anyone have simmilar numbers for a DDR3200 system?

Terra...
 
No. Rambus did say what patent they had.

Rambus invented the technology and was willing to share this. JEDEC is open standard, but it does not mean that they cannot have a royalty. The DRAM manufacturer's set prices. Rambus does not produce IC's, much like nVidia and ATi. They simply create the design.

Rambus had told the Patent office about their development and was working on a patent at the time, prior to joining JEDEC.

They openly offered to share their technology with a miniscule 1.5% royalty after they joined JEDEC. They were told that the idea's were crazy and wouldn't work. JEDEC started to work on the SDRAM design, and it was apparent that some of the things Rambus had patented were being incorporated into the design without paying a dime to the inventor. That's when Rambus jumped ship in JEDEC.

Did you read the full thread in the link I posted? I can't guarantee you'll change your mind. I was pretty anti-Rambus before I read that thread, but I read through it, and it made me rethink my position.

I'm not saying that Rambus has never done anything shady ever, but from what I can tell, the crux of the issue revolves around JEDEC members knowingly taking a technology invented by Rambus that was offered to them at an extremely reasonable cost and saying that it was a free and open standard when there was a patent held for much of the tech used.
 
If you violate a patent, you must pay the settlement fees. Hynix will pass these fees onto us and their other customers. But in all reality, if Hynnix, Micron, Infineon and Samsung all violated and have to pay damages, then they may get the capital back to get RDRAM back into the market.
Intel pulled out of the RDRAM market because they had to. The rest of the world went DDR and they were forced to capitulate or crap out early. Rambus screwed up by not offering RDRAM with AMD and or Via chips. Intel thought they could control the PC-600 than 800 memory channel and then something else happened. That something was DDR. Well no wonder they are getting sued. Intel should be on the receiving end of that suit too.
 
I just noticed somthing weird in my Membench in ScienceMark:

1.
Hyperthreading Technology (HTT) supported.

- 1 logic processors per physical processor.

WTF?!
My P4 2.4Ghz, dosn't have HTT :confused:

2.
Mem Method [ 4]: -1.00 MB/s_

Negative RAM speeds?
Wooooooot?

Terra - Could some one please educate me? :eek: *L*
 
Terra said:
BTW pxc, did you have time to look at my lantecy benchmark? :)
Does that corrospond with the numbers you used before?
It can't correspond since it's a CPU/memory subsystem benchmark. Caching and prefetching prevent memory from being isolated. And it's giving cycles and times based on CPU frequency. The chart you posted before was just memory timing alone.

The way Sciencemark tests memory latency is actually good, but it can't measure isolated memory performance. There are other benchmarks that can test uncached accesses.

I will say that a single PC3200 DIMM will give lower latency in SM, as this thread shows: http://www.hardforum.com/showthread.php?t=788719

(his XP-M 2.4GHz) 512 byte stride 109ns
(your P4 2.4GHz) 512 byte stride 161ns

Yeah it's an nForce1 board, but the XP-M has 1/2 the cache, a slower cache and a slower FSB, so the CPU portion of the mix isn't helping single channel DDR latency any. :p But at least both CPUs are running at the same frequency and the memory on both has the same theoretical bandwidth so it's not too far off to compare the scores.
 
Master [H] said:
No. Rambus did say what patent they had.
That statement and several others in that post go directly against what Rambus used as a defense in court. http://www.pcworld.com/news/article/0,aid,109084,tk,dn012903X,00.asp

Rambus defended the failure to disclose pending patents (as you can see in a previous post above that they were actively ammending during their JEDEC participation) by claiming the policy wasn't enforcable. Chalk up another to the crooks! Shady is as shady does.
 
i know my a-xp gets ~90-100ns usually, and my a64 rig gets ~35-45ns, but the integrated memory controller helps the latter tremendously

and for whoever cares.. i may not like rambus all that much, but i also have some strong feelings against JEDEC. who was it who decided not to make a ddr433, 466 and 500 standard when it was EASILY possible? instead waiting for ddr2, which has some serious design flaws, such as the massive tradeoff of cell speed for signaling speed. even now, with ddr2-1000 showing up, the actual speed of the dram cell hasn't surprassed that of ddr :rolleyes:
 
pxc said:
It can't correspond since it's a CPU/memory subsystem benchmark. Caching and prefetching prevent memory from being isolated. And it's giving cycles and times based on CPU frequency. The chart you posted before was just memory timing alone.

The way Sciencemark tests memory latency is actually good, but it can't measure isolated memory performance. There are other benchmarks that can test uncached accesses.

Could I be as bold as to ask you for links/names of those benchmarks? :)

I will say that a single PC3200 DIMM will give lower latency in SM, as this thread shows: http://www.hardforum.com/showthread.php?t=788719

(his XP-M 2.4GHz) 512 byte stride 109ns
(your P4 2.4GHz) 512 byte stride 161ns

I was more thinking of a P4 2.4Ghz with single channel DDR PC3200? :)

Yeah it's an nForce1 board, but the XP-M has 1/2 the cache, a slower cache and a slower FSB, so the CPU portion of the mix isn't helping single channel DDR latency any. :p But at least both CPUs are running at the same frequency and the memory on both has the same theoretical bandwidth so it's not too far off to compare the scores.

I would still have preferred a P4 on DDR RAM, but I guess that would be hard to find...but then again, if anyone is reading this and have P4 2.4Ghz on single channel DDR PC3200, please fell free to contribuate, thx :)

Terra...
 
Slightly OT, but in reference to Terra's P4 2.4GHz, the C version do have HyperThreading.

Back onto the topic:

The PCWorld article seems to insinuate that Rambus makes RDRAM. It does not, last I checked.

As far as the disclosure of the patent to JEDEC, the PCWorld article said this:

Because the disclosure policies of the JEDEC were ill-defined, Rambus can't be found guilty of fraud for having failed to disclose any current or pending patents, the court said.
and

One judge on the three-judge panel dissented from the fraud ruling. Circuit Judge Sharon Prost wrote that "JEDEC's disclosure policy required its members to disclose patents and pending applications that 'might be involved in the work they are undertaking.' While the majority rejected this standard as unbounded, nothing required JEDEC to formulate its policy with precision and clarity."
not to mention:

"When direct competitors participate in an open standards committee, their work necessitates a written patent policy with clear guidance on the committee's intellectual property position. A policy that does not define clearly what, when, how, and to whom the members must disclose does not provide a firm basis for the disclosure duty necessary for a fraud verdict," the court wrote in its opinion. Circuit Judges William Bryson and Randall Rader joined the majority opinion.
pxc:
Are you sure you linked the right article? A lot of what I'm reading the article you linked seems to give the impression that Rambus may very well not have disclosed everything in it's entirety, but there was also a lack of clearly defined regulations of what had to be exposed.

How is not disclosing information that's not been clearly defined in JEDEC's policy a crime?
 
Redbeard said:
RAMBUS's main problem, like I said earlier, has always been questionable business practices and not necessarily the technology.

What? That their fellow JDEC consortium members were thieves? Unless you mean it's usually a 'questioanble business practice' to do biz w/thieves, I don't know what you're talking about. Yeah, yeah, yeah, everybody said blahblahblah but the courts & juries keep finding for RAMBUS, so that tune is more than just a little off key.
 
jstnomega said:
What? That their fellow JDEC consortium members were thieves? Unless you mean it's usually a 'questioanble business practice' to do biz w/thieves, I don't know what you're talking about. Yeah, yeah, yeah, everybody said blahblahblah but the courts & juries keep finding for RAMBUS, so that tune is more than just a little off key.

Like we've said so many times, wrong doesn't always mean illegal.
 
If you read through the post at ARS, the guy defending RAMBUS has a stake or was involved financially with RAMBUS at some point in time.
 
Ultra Wide said:
If you read through the post at ARS, the guy defending RAMBUS has a stake or was involved financially with RAMBUS at some point in time.

Dosn't alter the document from the Patent Jugde...

Terra - But I will have to read that later...for now I'm off to never-never land ;)
 
When it comes to court cases now-a-days, it's not so much if your guilty or not, but rather who has the better lawyers.

Of course in this case, both sides could afford the very best lawyers, only it appears that Rambus ended up w/the best of the two, since they won.

As for Hynix being guilty or not, that's something we'll never know, though my bet is that Hynix was innocent. It’s not to say they couldn’t have violated a patent or two. It doesn't take much to violate one, since the differences between one and another can be a word or two. Even the very best patent lawyers, who work for companies like Hynix, can make mistakes. It doesn't mean they intentionally did it on purpose. I've had the opportunity to look up patents for a company I once worked for, and it's not easy, believe me. :rolleyes:

On the other hand, Rambus has always had a big credibility issue w/the majority of people, including industry. While we have a few die hard, and loyal supporters of Rambus here, and they certainly have that right, but if a poll were taken, I believe Rambus would loose by quit a bit.
 
Well, this discussion brings back lots of memories of discussions back in the day (and of merry arguments with other [H]'ers on the topic).

I haven't read the whole thread, but I'd like to chip in with my two cents' worth. This has probably all been mentioned before, but ultimately the failure of RDRAM in the marketplace boils down to this:

Intel chose RDRAM because it fit the then newly born P4 and netburst like a glove. So much so that Intel's plans moved away from SDRAM completely, and this upset the whole applecart, as OEMs, system builders, and end user shied away from the very high cost of RDRAM. When you consider a high-end server box with gigabytes of ram, the massive escalation in cost becomes readily apparent.

The fact that the AMD Athlon could achieve similar performance, using PC133 SDRAM is only relevant when you consider the pricing of RDRAM. The financial bottom line was the deciding factor for most system builders. An office PC does not need massively expensive componentry, in fact it is to be avoided. Unwittingly, Intel, by choosing the best tool (RDRAM) for the job they had to do (supplying netburst with data), gave AMD a big boost in the marketplace, and was no doubt responsible for much the Athlon's adoption by a market wary of AMD and their then-current stigma of poor yields and supply wrought by the K5 and K6).

Nevertheless, what "saved" Intel was that AMD had no answers in the server market. Only years later with the Opteron did we see enterprise-level multi-processing. Ironic, really, when the EV6 bus was so utterly hyped when the K7 came out. So Intel were free to push RDRAM, but Intel's end users rebelled because it was forced upon them. So many moved over to the Athlon.

And the rest is history. While I think RDRAM is a good technology and was very forward-looking back in the day, Intel got the sums wrong which hurt its chances of ever succeeding.

This whole saga is another fine example of where a good product is shortchanged by poor strategic thinking. History is full of those.
 
the price for rambus was crazy at the time, and compared to ddr2100 i would have rather had the cheaper one than paying 4 times the amount for rambus
 
Well all i know was that my buddys ram that came with his p4 alienware @ the time cost like 1200 bucks for 1 gig of it? lol!

so much money :)
 
GoHack said:
When it comes to court cases now-a-days, it's not so much if your guilty or not, but rather who has the better lawyers.

Of course in this case, both sides could afford the very best lawyers, only it appears that Rambus ended up w/the best of the two, since they won

Again I'm at amazed(if this true) that the peeople in the US just sit and do nothing about this...

As for Hynix being guilty or not, that's something we'll never know, though my bet is that Hynix was innocent. It’s not to say they couldn’t have violated a patent or two. It doesn't take much to violate one, since the differences between one and another can be a word or two.

We are not talking "a patent or two"...we are talking about 10 patents...
And I am reading the patent hugde document now, just to get REAL info...

Even the very best patent lawyers, who work for companies like Hynix, can make mistakes. It doesn't mean they intentionally did it on purpose. I've had the opportunity to look up patents for a company I once worked for, and it's not easy, believe me. :rolleyes:

Come on...10 patents?

On the other hand, Rambus has always had a big credibility issue w/the majority of people, including industry. While we have a few die hard, and loyal supporters of Rambus here, and they certainly have that right, but if a poll were taken, I believe Rambus would loose by quit a bit.

That's true, but I have a feeling it was more lies from the RAM cartel.
And an "appeal to majority" dosn't alter facts ;)

Terra...
 
I want a Phantom console with RDRAM and running SCO Openserver and compressed with Microsoft DriveSpace! :D
 
Terra said:
We are not talking "a patent or two"...we are talking about 10 patents...
And I am reading the patent hugde document now, just to get REAL info...



Come on...10 patents?


... vs. perhaps hundreds of patents?

I'm sure if you run those same patents through, say ten different patent lawyers, you'll most likely, if not guaranteed to have disagreements.

Take a look at a patent some time, and you try to fiqure it out. Not a simple one that covers some mechanical device, that easy, comparably, but one that covers an electronic device, or circuit on the micron size level.

Rambus's patents are on the theoretical end, since they are just a think tank. I don't know if they can run simulations via some computer program on their ideas. A lot may be pure theory, and could never been done practically.
 
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