R9 3xx series to debut HBM?

RJ1892

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Saw this coming since SKHynix announced their HBM release this year. Hopefully nVidia jumps on it as well, can't wait for HBM 2.0 though.
 

Yakk

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390x and freesync 4K monitors combo is looking more and more appealing.
 

spintroniX

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daddy likey...

I've been waiting for something with some wow factor. This could be it....
 

Dayaks

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Still not sure why people care about HBM at 4 GB where current bandwidth is fine.

You want 8GB capacity? Doubling the bandwidth makes sense to me then.
 

LordEC911

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Still not sure why people care about HBM at 4 GB where current bandwidth is fine.

You want 8GB capacity? Doubling the bandwidth makes sense to me then.

More bandwidth and much lower power costs.

Pascal is coming before Volta and has 3D memory + NVLink.

Pascal is likely a merge of Volta with other feature sets. Still a 2016 product...
 

Liger88

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Pascal is likely a merge of Volta with other feature sets. Still a 2016 product...


Pascal is in a nutshell Maxwell + Volta combined lol. Maxwell was a new architecture that lost all its important features and Volta was stripped of all of its and now just stands as a placeholder with no features. Meanwhile Pascal has them both.

I don't get Nvidia. I'm guessing the ARM thing is dead all out at this point.
 

Stoly

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Pascal is in a nutshell Maxwell + Volta combined lol. Maxwell was a new architecture that lost all its important features and Volta was stripped of all of its and now just stands as a placeholder with no features. Meanwhile Pascal has them both.

I don't get Nvidia. I'm guessing the ARM thing is dead all out at this point.

Nvidia never said Maxwell would include an ARM core, it was speculation derived from Tegra next gen Parker.
 

PRIME1

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I think the trump card for NVIDIA will be NVLink. That alone will be a huge advantage.

NVLink will connect the machines’ processors – CPUs and GPUs – so they can exchange data 5 to 12 times faster.

I assume this will only be on Intel based motherboards. It should remove a huge bottleneck.
 

TurboGLH

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I think the trump card for NVIDIA will be NVLink. That alone will be a huge advantage.



I assume this will only be on Intel based motherboards. It should remove a huge bottleneck.

Will it? Pci-e isn't the limiting factor right now, so I'm not sure how a faster link will help. Seems the limiting factor is how fast either the GPU (in most situations) or the CPU can do they work they need to do.

Anyone have more details on the implementation of NVlink?
 

LordEC911

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I think the trump card for NVIDIA will be NVLink. That alone will be a huge advantage.



I assume this will only be on Intel based motherboards. It should remove a huge bottleneck.

NVLink will likely not be implemented in GeForce cards and will only be beneficial in large arrays, HPC like environments.
 

Shark974

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NVIDIA announced they were moving to 3D stacked memory back in March.

Looks like AMD is going to be first by a huge margin, then. This alone makes the 380X just a massive technological jump from 980/970.

Wonder what Nvidia is doing with all their cash? Twiddling thumbs? Or perhaps AMD actually has more R&D $
 

The Mac

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im pretty sure i read somewhere nvidia is prohibited from using HBM for a year after AMD releases their first product using it.
 

Relayer

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Not really, if you develop something seems only fair that you get first dibs.

Well, if you are saying HBM would be AMD exclusive, that's one thing, but specifically banning nVidia and nobody else, I don't think would fly with the FTC.
 

ccityinstaller

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Well, if you are saying HBM would be AMD exclusive, that's one thing, but specifically banning nVidia and nobody else, I don't think would fly with the FTC.

AMD ponied up the research money and engineers, just like they did with GDDR3..AMD has been at the forefront of a lot of major GPU advances but you wouldn't know with PRIME1 and his buddies around..:rolleyes:
 

Dayaks

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I read the same thing about AMD exclusivity. A quick google search an this article popped up. http://wccftech.com/amd-20nm-r9-390x-feautres-20nm-hbm-9x-faster-than-gddr5/

There is absolutely nothing wrong with having new technology as exclusive to a single company. I develop technologies all the time for my company, sometimes in conjunction with others, and we certainly don't share them. It's not even a thought.

At 4GB this still doesn't make sense to me since the current bandwidth is adequate. Filling 8GB+ of VRAM is where HBM would shine. I think memory bandwidth on the current Maxwell GPUs is going to be a huge bottleneck above 4GB unless they do something to widen it.
 

Hornet

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I read the same thing about AMD exclusivity. A quick google search an this article popped up. http://wccftech.com/amd-20nm-r9-390x-feautres-20nm-hbm-9x-faster-than-gddr5/

There is absolutely nothing wrong with having new technology as exclusive to a single company. I develop technologies all the time for my company, sometimes in conjunction with others, and we certainly don't share them. It's not even a thought.

I do agree with you, but somehow I noticed nVidia often get a lot more flak when they do the same with their exclusive tech. I guess it has to do with AMD being seen by many as the underdog.


That said, I wonder if all these stacked RAM thing will increase the cost per GB. Having multiple folds more bandwidth isn't going to do much good if we're restricted in terms of capacity due to cost.
 

chithanh

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HBM specification is available to all JEDEC members. Plus I don't think that SK Hynix would refuse to do business with NVidia if they wanted to buy HBM parts.

But: Reports from earlier this year say that NVidia wants to use HMC starting with Pascal and not HBM. So I'd guess that NVidia is not interested in buying HBM, that is all.
 

limitedaccess

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Nvidia confirmed they will be using HBM for Pascal earlier this year. It was speculated before that HMC was one of the possibilities. They also showed a Pascal test vehicle with HBM on the same package as the GPU (possibly as eDRAM?).

Intel actually was the first to formally announce a stacked memory implementation, Knights Landing scheduled for 2015, which will be using a custom HMC solution and will have up to 16GB on board. Knight's Landing already has design wins for supercomputing applications.

The one thing that seems to be ignored regarding commentary with HBM is that all the available literature/documentation (eg. Hynix's current product datasheet and the leaked presentation slides) currently available only indicates up to 4GB capacity for Gen1 solutions available in 2015 for volume production. While Gen2 will not start sampling to customers until well into 2015 (as such volume production for end products likely late 2015 or 2016). While 4GB is arguably enough for a gaming product still, professional graphics represents a much more significant segment for Nvidia, and so this may actually be the likely reason why they will not move on from GDDR5 until emerging alternatives at least match capacity.
 

Relayer

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I read the same thing about AMD exclusivity. A quick google search an this article popped up. http://wccftech.com/amd-20nm-r9-390x-feautres-20nm-hbm-9x-faster-than-gddr5/

There is absolutely nothing wrong with having new technology as exclusive to a single company. I develop technologies all the time for my company, sometimes in conjunction with others, and we certainly don't share them. It's not even a thought.

At 4GB this still doesn't make sense to me since the current bandwidth is adequate. Filling 8GB+ of VRAM is where HBM would shine. I think memory bandwidth on the current Maxwell GPUs is going to be a huge bottleneck above 4GB unless they do something to widen it.

Try this again. There is a difference between one company having exclusivity and another company being singularly locked out. Which is what the post implied.

Edit: I should learn to read links people provide. Maybe I missed it but where does this article say nVidia is locked out or even that AMD had any exclusivity?

Nvidia will be using 3D stacked memory on its GPUs starting with Pascal in 2016, a full year after AMD. Volta was Nvidia’s scheduled GPU for 2015 that was supposed to use the Hybrid Memory Cube or HMC for short which was s 3D stacked memory technology competing with HBM. However after HMC’s development fell behind the roadmap it put a lot of pressure on Nvidia to look for an alternative technology, which they did. What’s painfully ironic however is that Nvidia ended up using the AMD and SK Hynix co-developed HBM with Pascal. Which the company confirmed earlier this year. Nvidia very rarely uses a technology developed by their competition if ever.

AMD bet on HBM early on, while Nvidia bet on the competing HMC standard. It seems AMD bet on the right technology and they stand to gain an entire year’s worth of exclusive access to the technology. Nvidia will simply have to make due with GDDR5 for 2015.

This is the explanation given for AMD having HBM first. nVidia just blew it by going with a competing design. Likely simply because it was AMD that co-developed HBM. Somehow that turns into AMD excluding nVidia.
 
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Final8ty

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I do agree with you, but somehow I noticed nVidia often get a lot more flak when they do the same with their exclusive tech. I guess it has to do with AMD being seen by many as the underdog.

Temporary exclusivity and continued exclusivity are 2 different things hence why NV gets more flack.
 

raghu78

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by AMD and Hynix who co-developed the technology...

Sorry but HBM is a JEDEC standard JESD235 adopted in Oct 2013. So no company can stop another company from bringing HBM based products to market.

https://www.jedec.org/standards-documents/docs/jesd235
http://www.cs.utah.edu/events/thememoryforum/mike.pdf

AMD helped drive the development of this memory standard with JEDEC. AMD worked with GF, Amkor and Hynix on 2.5D stacking and HBM from way back in 2011. Therefore its no surprise that they are a year ahead in bringing HBM based GPUs to market. Nvidia will bring HBM to market with Pascal in 2016.

http://sites.amd.com/la/Documents/TFE2011_001AMC.pdf
http://sites.amd.com/se/Documents/TFE2011_006HYN.pdf
http://www.amkor.com/index.cfm?objectid=E6A2243B-0017-10F6-B680958B1E902E87
http://semiaccurate.com/2011/10/27/amd-far-future-prototype-gpu-pictured/
 

LordEC911

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Sorry but HBM is a JEDEC standard JESD235 adopted in Oct 2013. So no company can stop another company from bringing HBM based products to market.

It is a grey area. Who knows what goes on in these negotiations.
No one has to sell their products to Nvidia either... but why would anyone not sell a product?
 

raghu78

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It is a grey area. Who knows what goes on in these negotiations. No one has to sell their products to Nvidia either... but why would anyone not sell a product?

You do realize that HBM on its own cannot function without the supporting technologies - Thin silicon vias (TSV) and 2.5D stacking on silicon interposer. These bring fundamental changes in the way semiconductor chips (logic + DRAM) are built.

Read page 6 and 7

http://books.google.co.in/books?id=...EwCA#v=onepage&q=GLOBALFOUNDRIES OSAT&f=false

TSMC introduced CoWoS way back in 2011 and Xilinx has been shipping low volume and very high priced FPGAs using 2.5D stacking from late 2011.

http://www.xilinx.com/innovation/research-labs/keynotes/3-D_Architectures.pdf
http://www.xilinx.com/support/docum...0_Stacked_Silicon_Interconnect_Technology.pdf
http://www.eetimes.com/document.asp?doc_id=1316816
http://semiaccurate.com/2012/11/08/a-look-at-how-xilinx-uses-stacking-on-the-virtex-7-ht/

CoWoS was not widely adopted due to cost concerns. TSMC has designed Integrated FanOut Wafer Level Package (InFO-WLP) to address the cost concerns.

http://www.eetimes.com/author.asp?doc_id=1322075

"In chip stacks, TSMC has developed low cost packaging alternatives in addition to its well known Chip on Wafer on Substrate (CoWoS) technology. They aim to serve a wide range of applications that could make 2.5-D/3-D packaging technology a strong third leg of the foundry's capabilities.TSMC positioned CoWoS as a high-end process both in capabilities and cost. It offers up to 4,000 pins and allows interposers of up to 832mm2 using a 32 x 26mm reticle size.

By contrast, TSMC's next offering -- called an Integrated Fan Out Wafer-level Package (InFO-WLP) -- eliminates the costly substrate, streamlines manufacturing, but supports fewer pins and a smaller interposer area. It will start risk production before the end of the year, said Doug Yu, a senior director for chip stacks at TSMC.

In addition, an InFO PoP configuration will enable stacking a wire-bonded multi-die package on top of an InFO-WLP. It provides a thermally simpler design for applications that can tolerate additional package height. At the low end, a 2.5-D technology TSMC called Wafer-level Chip Scale Package will support devices with up to 800 pins."

http://www.techdesignforums.com/blog/2013/11/07/3d-ic-tsmc-demonstrator-info-interposer/

So depending on the product needs of the customer they could go for CoWoS which supports a maximum reticle size of 32 x 26 mm or InFO-WLP which supports maximum reticle size of 25 x 25 mm. Moreover there are different production models being followed by different foundries -
from page 7 of the book "Handbook of 3D Integration"

TSMC follows a one-stop-shop turnkey line that includes all of the assembly and test steps traditionally handled by outsourced semiconductor assembly and test facilities (OSAT). Globalfoundries and UMC follow a open ecosystem model where they handle TSV fabrication (Cu, via-middle) and other front end steps while chips from various vendors would be back end processed (temporary bonding/debonding, thinning , assembly and test ) by their OSAT partners.

http://www.tsmc.com/english/dedicatedFoundry/services/cowos.htm

"Fully integrated 300mm capability, TSV, micro-bump, solder bump, backside processes and assembly."

Nvidia has lagged AMD when it comes to adopting the latest memory standards. Nvidia did not introduce GDDR5 at the high end till GTX 480 in April 2010 whereas AMD introduced the HD 4870 with GDDR5 in June 2008. We can expect AMD to lead Nvidia in time to market on HBM by 12 - 18 months.
 

The Mac

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Sorry but HBM is a JEDEC standard JESD235 adopted in Oct 2013. So no company can stop another company from bringing HBM based products to market.

https://www.jedec.org/standards-documents/docs/jesd235
http://www.cs.utah.edu/events/thememoryforum/mike.pdf

AMD helped drive the development of this memory standard with JEDEC. AMD worked with GF, Amkor and Hynix on 2.5D stacking and HBM from way back in 2011. Therefore its no surprise that they are a year ahead in bringing HBM based GPUs to market. Nvidia will bring HBM to market with Pascal in 2016.

http://sites.amd.com/la/Documents/TFE2011_001AMC.pdf
http://sites.amd.com/se/Documents/TFE2011_006HYN.pdf
http://www.amkor.com/index.cfm?objectid=E6A2243B-0017-10F6-B680958B1E902E87
http://semiaccurate.com/2011/10/27/amd-far-future-prototype-gpu-pictured/

Last i checked, a standard is not a shipping product.

A standard requires the technology, IP, and manufacturing to support it.

Nothing is stopping nvidia from developing their own technology based on the JDEC standards.

But they have not (or more precisely failed in their attempt)
 

rinaldo00

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I think it was a poor choice for the article to use the word 'exclusive' Yes, AMD will be the only company with HBM, but not because Nvidia or anyone else was 'excluded' from using it, but because Nvidia went with HMC instead.
 
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