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Negative_3
n00b
- Joined
- Apr 14, 2008
- Messages
- 45
Hi, I have a question about cache.
First, consider a process running in a single thread. OS's will sometimes change whatever core is running the process. Suppose core 0 on a Q6600 is running the process, then the OS decides to have core 3 on a Q6600 run the process.
What happens if variable x is stored in a cache line in core 0's cache bank. Then when the process switches over to core 3, it tries to read x, realizes its new cache bank doesn't have x's cache line and then reads x's cache line from system RAM. This might have a different value of x than what it was last using.
How does this problem get avoided on computers? I guess when ever an OS decides to shuffle processes around, it can tell the CPU to write all the cache lines back to system RAM.
First, consider a process running in a single thread. OS's will sometimes change whatever core is running the process. Suppose core 0 on a Q6600 is running the process, then the OS decides to have core 3 on a Q6600 run the process.
What happens if variable x is stored in a cache line in core 0's cache bank. Then when the process switches over to core 3, it tries to read x, realizes its new cache bank doesn't have x's cache line and then reads x's cache line from system RAM. This might have a different value of x than what it was last using.
How does this problem get avoided on computers? I guess when ever an OS decides to shuffle processes around, it can tell the CPU to write all the cache lines back to system RAM.