NVIDIA to Tap TSMC's A16 Node for "Feynman" GPUs

[erek]

"The most appealing aspect of the A16 node will be its backside power delivery, which separates power and signal routing to reduce losses and simplify floor planning. Implementations range from buried power rails that still use a front-side lowest metal layer to power vias that reach the rear side. TSMC's Super Power Rail concept enables power to be delivered directly to the transistor's source and drain terminals, resulting in lower resistance. Those choices affect efficiency, layout, and thermal behavior. Power demands for high-end AI accelerators are rising fast. Current flagship solutions already draw about 1,400 W in Blackwell Ultra, and next-generation Rubin designs are expected to exceed 2,300 W. Hence, node selection will be critical for the next-generation Feynman design, given its multi-gigawatt power requirement. If A16 reaches volume production on schedule, first silicon could arrive in late 2027 or early 2028."

Source: https://www.techpowerup.com/341011/nvidia-to-tap-tsmcs-a16-node-for-feynman-gpus

 

[Marees]

TSMC's back-side power supply A16 is coming soon, and Nvidia is expected to be the first to adopt it despite the high price.​

Entering a golden period of growth, mass production will begin in the second half of next year, and Nvidia is considering introducing​

TSMC's A16, which will go into mass production in the second half of next year, will be a significant turning point in TSMC's most advanced manufacturing processes, with AI applications dominating the industry for the first time.

Facing competition, supply chain sources indicate that Nvidia is considering adopting TSMC's most advanced process, the A16 (with a back-end powered 2nm process), which will be mass-produced in the second half of next year.


Semiconductor industry analysts say that although 2nm is expensive, with Apple's 2nm chip costing nearly $27,000 each and Nvidia's back-of-chip power supply version costing more than $30,000, the significant increase in performance and chip density makes it the key reason for many customers to "pay for value."

Analysts believe that to ensure the yield of more refined processes, demand for testing and verification will increase, including SLT (system-level testing), AOI (automated optical inspection), and burn-in testing. Previously used primarily for production line monitoring, AOI will be integrated deeper into the wafer manufacturing process, achieving inspection accuracy levels beyond the reach of the naked eye. This will drive demand for related testing equipment, such as those from companies like Maktec and Huayouyi.


https://www-ctee-com-tw.translate.g...0501?_x_tr_sl=auto&_x_tr_tl=en&_x_tr_hl=en-GB

 

[erek]

TSMC's back-side power supply A16 is coming soon, and Nvidia is expected to be the first to adopt it despite the high price.​

Entering a golden period of growth, mass production will begin in the second half of next year, and Nvidia is considering introducing​

TSMC's A16, which will go into mass production in the second half of next year, will be a significant turning point in TSMC's most advanced manufacturing processes, with AI applications dominating the industry for the first time.

Facing competition, supply chain sources indicate that Nvidia is considering adopting TSMC's most advanced process, the A16 (with a back-end powered 2nm process), which will be mass-produced in the second half of next year.


Semiconductor industry analysts say that although 2nm is expensive, with Apple's 2nm chip costing nearly $27,000 each and Nvidia's back-of-chip power supply version costing more than $30,000, the significant increase in performance and chip density makes it the key reason for many customers to "pay for value."

Analysts believe that to ensure the yield of more refined processes, demand for testing and verification will increase, including SLT (system-level testing), AOI (automated optical inspection), and burn-in testing. Previously used primarily for production line monitoring, AOI will be integrated deeper into the wafer manufacturing process, achieving inspection accuracy levels beyond the reach of the naked eye. This will drive demand for related testing equipment, such as those from companies like Maktec and Huayouyi.


https://www-ctee-com-tw.translate.g...0501?_x_tr_sl=auto&_x_tr_tl=en&_x_tr_hl=en-GB

"NVIDIA Secures TSMC A16 Node for Next-Generation "Feynman" GPUs​

by AleksandarK Today, 05:56 Discuss (4 Comments)
According to supply chain sources and those close to TSMC, NVIDIA is already working on prototyping the replacement for its "Rubin" and "Rubin Ultra" GPU designs with the next-generation "Feynman" GPU microarchitecture. As noted in the latest report from DigiTimes, NVIDIA is opting for TSMC's A16 node, bypassing the N2 family of nodes entirely in favor of the more advanced 1.6 nm A16 design. Mass production is scheduled for the second half of 2028. The "Feynman" designs will rely on the backside power delivery in the A16 node, as well as on packaging technologies like 3D chiplets using SoIC, CoWoS-L 2.5D integration, and next-generation panel-level packaging.

Initially, NVIDIA will use SoIC 3D stacking technology to stack multiple chiplets into a single package, which will shorten the travel time between chips and reduce latency. These 3D chips will then be packaged side-by-side in a CoWoS-L or CoPoS packaging, creating a multi-kilowatt design capable of processing dozens of PetaFLOPS. For memory, NVIDIA will work with its partners to develop customized HBM, likely HBM4E, by the time "Feynman" reaches mass production. This customized memory includes a specialized base die that can contain logic elements like a memory controller or packet processing unit. Think of it as a way to pre-process data before it enters memory, or as a simple speedup, depending on what NVIDIA aims to achieve.

The final piece of the puzzle will be co-packaged optics (CPO), where NVIDIA will introduce optical interconnects between GPUs to reduce latency and power requirements imposed by traditional copper connections. The current "Blackwell" NVL72 rack has a total bandwidth of 130 TB/s between GPUs. "Rubin" doubles that to 260 TB/s, while "Rubin Ultra" also doubles the total bandwidth to 520 TB/s. For "Feynman," the only way to increase system performance is to implement CPO and harness the speed of light to deliver over 1,000 TB/s total system bandwidth, breaking into the petabyte range. All of this will be achieved using TSMC's COUPE technology."
Source: DigiTimes