NVIDIA Reportedly Using TSMC’s CoWoS

Auer

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NVIDIA Reportedly Using TSMC’s CoWoS
A new report coming from DigiTimes suggests that Nvidia is on the short list of customers that could be using TSMC’s CoWoS (Chip-on-Wafer-on-Substrate) packaging for its upcoming GPUs.

TSMC’s CoWoS is a 2.5D packaging technology that packages multiple dies together at the wafer level on an interposer, something TSMC calls “wafer integration.” TSMC’s CoWoS has evolved to be able to target chips that far exceed the reticle limit, up to 2x reticle limit. TSMC and Broadcom recently illustrated this with the first 2x reticle limit interposer that will end up being used by Broadcom in HPC deployment. TSMC does this by essentially stitching interposers together at the wafer level and interconnecting them.

The benefits of CoWoS are improved interconnect performance and bandwidth, transistor density, and higher memory capacity -- TSMC’s current generation CoWoS currently supports up to six stacks of HBM.

As for what Nvidia would be targeting with TSMC’s current CoWoS is unknown. However, it’s worth noting Nvidia has used TSMC’s CoWoS packaging before on Pascal and Volta-based professional GPUs. It’s likely that Nvidia would be leveraging TSMC’s technology again for its upcoming Titan, Tesla, or Quadro cards -- presumably based on Ampere. But, we’ll see.

https://www.gamersnexus.net/news-pc/3563-hw-news-human-malware-vs-pc-amd-zen-vulnerability
 
Geez like we Nvidia needs another reason to make their GPU prices go up even more.
 
Geez like we Nvidia needs another reason to make their GPU prices go up even more.

What nVidia really needs is some good competition from AMD. While part of their cost is just the fact that ya, these big chips cost a lot to make, another part is "fuck you because we can" since they just don't have competition at the high end. If AMD was able to release competitive cards, you can bet your ass that magically the price would go down. I keep hoping AMD will get back in it... but so far things haven't been great. They manage some mid range competition but that's it :/
 
Geez like we Nvidia needs another reason to make their GPU prices go up even more.

Given the fact that Die shrinks are going the way of the dodo, the only way to keep the performance growing on Tesla cards is through increasing effective reticle size.

This essentially the multi-GPU everyone has been calling for, except it's done at the die level.

I'm sure it also supports the latest HBM2E.

The mainstream 102 die size will be aroubnd 600 mm^2, and use GDDDR6. Just like the last two Nvidia generations before Turing.
 
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