New System Could Break Bottleneck In Microprocessors

Megalith

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A modern challenge of microprocessor design is figuring out how to make cores communicate with one another faster, and engineers at North Carolina State University and Intel believe the answer may come from shifting software queues to hardware. A dedicated set of logic circuits called the Queue Management Device have presented double core-to-core communication speed, with higher core counts resulting in even more pronounced improvement.

To prevent…cores from wantonly overwriting each other’s information, processing data out of order, or committing other errors, multicore processors use lock-protected software queues…But all that extra software comes with significant overhead, which only gets worse as the number of cores increases. The solution—born of a discussion with Intel engineers and executed by Solihin's student, Yipeng Wang, at NC State and at Intel—was to turn the software queue into hardware. This effectively turned three multistep software queue operations into three simple instructions—add data to the queue, take data from the queue, and put data near where it’s going to be needed next.
 
I had always felt that the solution would be hardware controllers on die. However, I'm curious about how much die room that this would take up, or if it would need a bigger die, increasing costs.
 
As long as the increased performance outweighs the increased cost, it'll work.

Or you know, if Intel simply makes it standard then you'll pay for it regardless if you want new chips, barring going to another mfg.

Speaking of another mfg, can AMD do anything like this with their chips? The it onto Zen+? Or license it from Intel?

Does this just help x86 or will it help ARM, PowerPC, etc?
 
^lol no, coherency and locking isn't something AMD thought of first

The real bottleneck: Suddenly, a wild Amdahl's law appears!
 
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