More Woodcrest verse's Opties

Might finally give AMD a run in the workstation market, but Woodcrest is still non-scalable past two. Until Intel realizes the utter stupidity and futility of shared bus architecture, they're still not going to be competing with the 8xx's. You lose too much from the shared bus. If you look at benchmarks, you see where the shared memory bus - even with FBDIMMs - starts hurting Woodcrest.

What really sucks is that for all the power Woodcrest has, still no boards with an HTX slot in sight. (Please correct me if I'm wrong. And HyperTransport is not HTX. HTX is a separate slot.) And more and more folks are starting to realize that HTX is worth it in grids. So I'm stuck with 2xxEE's, 2xxHE's and 8xxHE's because I can't get the bandwidth to actually use a Woodcrest.
 
AreEss said:
Might finally give AMD a run in the workstation market, but Woodcrest is still non-scalable past two. Until Intel realizes the utter stupidity and futility of shared bus architecture, they're still not going to be competing with the 8xx's. You lose too much from the shared bus. If you look at benchmarks, you see where the shared memory bus - even with FBDIMMs - starts hurting Woodcrest.
Click to expand...

That's why in 4 way and up Xeon trounces Opteron...

What really sucks is that for all the power Woodcrest has, still no boards with an HTX slot in sight. (Please correct me if I'm wrong. And HyperTransport is not HTX. HTX is a separate slot.) And more and more folks are starting to realize that HTX is worth it in grids. So I'm stuck with 2xxEE's, 2xxHE's and 8xxHE's because I can't get the bandwidth to actually use a Woodcrest.
Click to expand...

??Huh ? Since when is HTX ( based on HT ) the most important thing in the world ?
There is PCI-E also.
 
AreEss said:
Might finally give AMD a run in the workstation market, but Woodcrest is still non-scalable past two. Until Intel realizes the utter stupidity and futility of shared bus architecture, they're still not going to be competing with the 8xx's. You lose too much from the shared bus. If you look at benchmarks, you see where the shared memory bus - even with FBDIMMs - starts hurting Woodcrest.
Click to expand...

The Opterons may scale better, but the 4+ socket market is still heavily dominated by big business, and there is still a very strong Intel bias there.

I have a feeling as long as the Woodcrest chips can hold their own (and we haven't seen what the Intel multi-socket boards can do yet) Intel will be able to make a solid showing with Woodcrest until Nehalem hits the market and an IMC finally becomes a reality.
 
AreEss said:
Might finally give AMD a run in the workstation market, but Woodcrest is still non-scalable past two. Until Intel realizes the utter stupidity and futility of shared bus architecture, they're still not going to be competing with the 8xx's. You lose too much from the shared bus. If you look at benchmarks, you see where the shared memory bus - even with FBDIMMs - starts hurting Woodcrest.
Click to expand...


While I agree with you that the FSB needs to go away for servers.... it's not as big of a deal on DP at the moment, and will end up the same way on 4-way soon. Bensley uses dual independent FSB's and soon I believe the MP market will. Combine that, on the DP side, with FBDIMMs and you really don't really see many negatives with the FSB.... at least compared to current AMD offerings. Now.... keep your eyes out late next year for some really trick shit.
 
Poncho said:
While I agree with you that the FSB needs to go away for servers.... it's not as big of a deal on DP at the moment, and will end up the same way on 4-way soon. Bensley uses dual independent FSB's and soon I believe the MP market will. Combine that, on the DP side, with FBDIMMs and you really don't really see many negatives with the FSB.... at least compared to current AMD offerings. Now.... keep your eyes out late next year for some really trick shit.
Click to expand...

Poncho glad you came in . Can you tell us anything about what Intel is doing in the 3Rd qt. of this year with 8way its suppose to be = or > than an opty system using net burst cpu's. Come on spill the beans.
 
AreEss said:
Might finally give AMD a run in the workstation market, but Woodcrest is still non-scalable past two. Until Intel realizes the utter stupidity and futility of shared bus architecture, they're still not going to be competing with the 8xx's. You lose too much from the shared bus. If you look at benchmarks, you see where the shared memory bus - even with FBDIMMs - starts hurting Woodcrest.

What really sucks is that for all the power Woodcrest has, still no boards with an HTX slot in sight. (Please correct me if I'm wrong. And HyperTransport is not HTX. HTX is a separate slot.) And more and more folks are starting to realize that HTX is worth it in grids. So I'm stuck with 2xxEE's, 2xxHE's and 8xxHE's because I can't get the bandwidth to actually use a Woodcrest.
Click to expand...

Most servers sold are DP so the fact that Intel is = or > than the Opties bolds well for Intel. I wouldn't count woodcrest out of the 4 way market . So far everytime someone tries to put the Merom family down they come back to bite .
 
$BangforThe$ said:
Poncho glad you came in . Can you tell us anything about what Intel is doing in the 3Rd qt. of this year with 8way its suppose to be = or > than an opty system using net burst cpu's. Come on spill the beans.
Click to expand...

Planning, planning, and more planning. :D
 
Poncho said:
While I agree with you that the FSB needs to go away for servers.... it's not as big of a deal on DP at the moment, and will end up the same way on 4-way soon. Bensley uses dual independent FSB's and soon I believe the MP market will.
Click to expand...

DIB is present in the MP market since spring 05 in the form of the E8500 chipset. ;)
 
$BangforThe$ said:
Poncho glad you came in . Can you tell us anything about what Intel is doing in the 3Rd qt. of this year with 8way its suppose to be = or > than an opty system using net burst cpu's. Come on spill the beans.
Click to expand...

Intel will launch Tulsa in Q3

3.4GHz DC
2x1MB + 16MB shared L3
667/800MHz FSB
VT,HT,Pellston
150w
1.3 billion transistors ;)
30-100% better than Paxville 7040/1
 
savantu said:
DIB is present in the MP market since spring 05 in the form of the E8500 chipset. ;)
Click to expand...

I should have specified quad independent FSBs for the MP market. While DIB is better.... MP servers are still starved for bandwidth.
 
Now your talking Poncho QIB FSB . That should do the job. I like the sound of the that QIB. Come on Poncho your holding back on the HSL between the processors . Spill the beans.
 
$BangforThe$ said:
Now your talking Poncho QID FSB . That should do the job. I like the sound of the that QID
Click to expand...

Eh.. it's a band-aid IMHO. Until we go to an IMC then we aren't really that competitive in the server market. There are A LOT of benifits to FBDIMMs but a few drawbacks. The problems, while not life or death, are getting worked out. Power being the biggest issue. Kinda funny, you end up going to a lower processor (65 watts on all but the 3ghz model is amazing) but end up with RAM that uses more power. LOL, it's like 2 steps forward 1 step back. :D
 
Poncho said:
Eh.. it's a band-aid IMHO. Until we go to an IMC then we aren't really that competitive in the server market. There are A LOT of benifits to FBDIMMs but a few drawbacks. The problems, while not life or death, are getting worked out. Power being the biggest issue. Kinda funny, you end up going to a lower processor (65 watts on all but the 3ghz model is amazing) but end up with RAM that uses more power. LOL, it's like 2 steps forward 1 step back. :D
Click to expand...

LOL, it's like 2 steps forward 1 step back. Lets hope that works out better for Intel than it did for the U.S.S.R.
 
Is whats funny about FBdimms is Intel works out the problems with the memory makers than and only than does AMD step in to use that tech. Got to give them credit for that .
 
$BangforThe$ said:
LOL, it's like 2 steps forward 1 step back. Lets up that works out better for Intel than it did for the U.S.S.R.
Click to expand...


Well, as long as we can outspend AMD, like we did in the cold war, then we should be cool. :D
 
question for you poncho.

The Bensley platform supports quad channel FBDIMM and can crank out up to 21 GB/sec. Why is it that when memory benchmarks are run, Woodcrests only get 5 GB/sec while the AMDs are past 11 GB/sec using normal dual channel DDR?
 
Duke3d87 said:
question for you poncho.

The Bensley platform supports quad channel FBDIMM and can crank out up to 21 GB/sec. Why is it that when memory benchmarks are run, Woodcrests only get 5 GB/sec while the AMDs are past 11 GB/sec using normal dual channel DDR?
Click to expand...


Possibly because of the setup. It's crucial that you set-up memory with the proper speed and configuration to get the most out of it. Post a link to this test that you are talking about and I'll take a look at it.
 
Duke3d87 said:
question for you poncho.

The Bensley platform supports quad channel FBDIMM and can crank out up to 21 GB/sec. Why is it that when memory benchmarks are run, Woodcrests only get 5 GB/sec while the AMDs are past 11 GB/sec using normal dual channel DDR?
Click to expand...

Because the FSB is limited to 10.6GBs and arbitration+coherency issues between the 2 FSBs means actual BW efficiency is quitte low.( 50% compared to 90% for Opterons )

Besides , Opteron get around 5GBs too but due to NUMA you have 2x that ( altough from a real world perspective that is close to useless )

I wonder how Socket F will improve RAM BW for Opterons.
 
Poncho said:
they should have used 667mhz FBDIMMs for the Woodcrest tests, would have made a bit of a difference, though the FSB is still a limiting factor.
Click to expand...
would it have made a tangable difference? I remember the INQ saying that if you have a Dempsey with a 1066 Mhz FSB, you want at least DDR533, but if you have a woodcrest, you really want DDR667,
 
Duke3d87 said:
would it have made a tangable difference? I remember the INQ saying that if you have a Dempsey with a 1066 Mhz FSB, you want at least DDR533, but if you have a woodcrest, you really want DDR667,
Click to expand...

You do get better performance if you match up the FSB with the Memory speed, with 1333fsb you want 667 memory. Now... is it life or death? not at all... but to get the most from it, match the speeds up.
 
Finely someone agrees that running FSB and memory @ 1:1 agrees. It is a little unfair tho as myself and Poncho have the advantage of knowing this first hand.
 
Poncho said:
You do get better performance if you match up the FSB with the Memory speed, with 1333fsb you want 667 memory. Now... is it life or death? not at all... but to get the most from it, match the speeds up.
Click to expand...

Clock domain crossing is bad, mmkay? Period. It can incur huge penalties or small penalties. Depends how much skew, how fast, how many domains.
Matched is always fastest, period. That's why AMD's DDR-400 and DDR2-800. No clock domain crossing necessary, which significantly improves latency and bandwidth.

As far as IMC; no. It's not necessary. An IMC is a lot of work on the CPU, and many days I wonder why AMD did it. That's not to say an IMC isn't beneficial; only that it's not the only solution. Multi-channel multi-output arbitrated memory controllers, and multi-port programmable memory controllers (neither of which exist to my knowledge, at least at these kind of speeds and bandwidth, heh) also fill the bill nicely. The key is eliminating your bottlenecking points. If you have a memory controller which can output to 2 CPUs from 4 channels, running at 400MHz with DDR400, with internal crossbar and allowing either CPU to access any channel, it will be faster than Opterons.
 
savantu said:
Because the FSB is limited to 10.6GBs and arbitration+coherency issues between the 2 FSBs means actual BW efficiency is quitte low.( 50% compared to 90% for Opterons )

Besides , Opteron get around 5GBs too but due to NUMA you have 2x that ( altough from a real world perspective that is close to useless )

I wonder how Socket F will improve RAM BW for Opterons.
Click to expand...


Socket F is more than people know . Its not just a socket upgrade and better effieciency.

I won't pimp for AMD . So find your own links but trust me its more.
 
AreEss said:
Clock domain crossing is bad, mmkay? Period. It can incur huge penalties or small penalties. Depends how much skew, how fast, how many domains.
Matched is always fastest, period. That's why AMD's DDR-400 and DDR2-800. No clock domain crossing necessary, which significantly improves latency and bandwidth.

As far as IMC; no. It's not necessary. An IMC is a lot of work on the CPU, and many days I wonder why AMD did it. That's not to say an IMC isn't beneficial; only that it's not the only solution. Multi-channel multi-output arbitrated memory controllers, and multi-port programmable memory controllers (neither of which exist to my knowledge, at least at these kind of speeds and bandwidth, heh) also fill the bill nicely. The key is eliminating your bottlenecking points. If you have a memory controller which can output to 2 CPUs from 4 channels, running at 400MHz with DDR400, with internal crossbar and allowing either CPU to access any channel, it will be faster than Opterons.
Click to expand...

Another Intel employee. and he knows about the crossbar link . MORE MORE
 
$BangforThe$ said:
Another Intel employee. and he knows about the crossbar link . MORE MORE
Click to expand...

Holy crap, I'm an Intel employee?! I wish somebody'd told me, I want my goddamn paychecks! :D
Seriously though; no. Not an Intel or AMD employee. I just have a very thorough understanding of microarchitecture. :)
 
Ok . I thought because you knew what you were talking about You worked for Intel. The cross bar intregued me because there are whispers.
 
Poncho said:
You do get better performance if you match up the FSB with the Memory speed, with 1333fsb you want 667 memory. Now... is it life or death? not at all... but to get the most from it, match the speeds up.
Click to expand...

Regarding this point, I know that fsb = quad pumped and memory is double data so 1333 = 667. Now look at this article:

http://www.techfear.com/articles/2006/6/corsair_twin2x1024-8500.shtml

The Corsair Twin2X1024-8500 1GB (2 x 512MB) kit is the first mass produced memory to support the larger 1066 MHz bandwidth typically capitalized upon by the Pentium Extreme Edition series of processors.
Click to expand...

Now is there something wrong with that statement? You don't need 1066 memory to utilize the larger bandwidth of Pentium EE's right? Or do you? And this is evidenced by the results of the benchmarks.
 
AreEss said:
Clock domain crossing is bad, mmkay? Period. It can incur huge penalties or small penalties. Depends how much skew, how fast, how many domains.
Matched is always fastest, period. That's why AMD's DDR-400 and DDR2-800. No clock domain crossing necessary, which significantly improves latency and bandwidth.

As far as IMC; no. It's not necessary. An IMC is a lot of work on the CPU, and many days I wonder why AMD did it. That's not to say an IMC isn't beneficial; only that it's not the only solution. Multi-channel multi-output arbitrated memory controllers, and multi-port programmable memory controllers (neither of which exist to my knowledge, at least at these kind of speeds and bandwidth, heh) also fill the bill nicely. The key is eliminating your bottlenecking points. If you have a memory controller which can output to 2 CPUs from 4 channels, running at 400MHz with DDR400, with internal crossbar and allowing either CPU to access any channel, it will be faster than Opterons.
Click to expand...

AMD's has problems with Math

http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2762&p=10

The Odd Multiplier Issue
Another item that was working against the Athlon 64 X2 5000+ on the previous page was the fact that it used an odd clock multiplier, in this case 13.0, in order to achieve its 2.6GHz clock speed. The problem with odd clock multipliers on AM2 CPUs is that the memory controller actually runs at DDR2-742 instead of DDR2-800. AM2 CPUs with even clock multipliers can run at DDR2-800 without any problems, and the reason why is pretty simple.

Below is the equation for calculating the memory speed of any Athlon 64 processor:

Reference Clock * Clock Multiplier = CPU Frequency

CPU Frequency / Memory Divisor = Memory Frequency
Click to expand...
 
deeznuts said:
Regarding this point, I know that fsb = quad pumped and memory is double data so 1333 = 667. Now look at this article:

http://www.techfear.com/articles/2006/6/corsair_twin2x1024-8500.shtml



Now is there something wrong with that statement? You don't need 1066 memory to utilize the larger bandwidth of Pentium EE's right? Or do you? And this is evidenced by the results of the benchmarks.
Click to expand...


Yea, that's marketing plain and simple. 1066fsb will match up 1:1 with DDR2-533 running in dual channel mode, 1333fsb with DDR2-667. Now... the performance benifits of matching the memory doesn't really apply to desktop processors anymore like it did with DDR and the 800fsb northwoods and early prescotts. Faster memory is better on 945/955/975 and 965 based systems, more so on 965 though.
 
deeznuts said:
Regarding this point, I know that fsb = quad pumped and memory is double data so 1333 = 667. Now look at this article:

http://www.techfear.com/articles/2006/6/corsair_twin2x1024-8500.shtml

Now is there something wrong with that statement? You don't need 1066 memory to utilize the larger bandwidth of Pentium EE's right? Or do you? And this is evidenced by the results of the benchmarks.
Click to expand...

They blew it! They're like the site who thought Prescott 17% higher latency was a good thing LOL!

Woodcrest on Bensley features Two Independent FSB with their own link that features 1066MHz and 8.4GB in one config and 13333MHz FSB and 10.6GB (rounded up to 10.6GB BTW) to the MCH. Intel extends the Hub to Cover whatever bandwidth the system needs=P That's up to about 21GB.

Woodcrest has built in smart memory access, smart cache and yada yada just like Conroe. Look at its slower memory benchmark results as being INCORRECTLY reported or other results would look similar. Another clear example of this is Sandra not showing any improvements to Dual Processor Opterons before it was updated. Same thing will happen here.

Asynchronous System clock gens and whatever else doesn't take a hit like i875 and older ones did.
 
So lets say I had an XE 6800 and used a DDR2 533@ 1;1 with a multiplier of 11.
Using Corsair 5400ul with timings of 3-2-2-8 which will run these timings up to DDR2 700 just fine. That would give me a cpu bus speed of 350. a cpu clock speed of 3.85ghz. and a fsb speed of 1400. all this while remaining @ 1:1 with timings of 3-2-2-8. I won't argue the merits of this setup . But this is the way I would go to get the very best performance out of a XE6800 @ 3.85ghz. I think you would be very hard pressed to beet this combination . running cpu @ 3.85ghz . with any other memory combination . I very seriously doubt I am wrong on this issue. I dont care if your running the memory at DDR2 1000 I doubt you could match the performance of the setup I just laid out.
 
AreEss said:
Clock domain crossing is bad, mmkay? Period. It can incur huge penalties or small penalties. Depends how much skew, how fast, how many domains.
Matched is always fastest, period. That's why AMD's DDR-400 and DDR2-800. No clock domain crossing necessary, which significantly improves latency and bandwidth.

As far as IMC; no. It's not necessary. An IMC is a lot of work on the CPU, and many days I wonder why AMD did it. That's not to say an IMC isn't beneficial; only that it's not the only solution. Multi-channel multi-output arbitrated memory controllers, and multi-port programmable memory controllers (neither of which exist to my knowledge, at least at these kind of speeds and bandwidth, heh) also fill the bill nicely. The key is eliminating your bottlenecking points. If you have a memory controller which can output to 2 CPUs from 4 channels, running at 400MHz with DDR400, with internal crossbar and allowing either CPU to access any channel, it will be faster than Opterons.
Click to expand...

You do know you just described the ATI R520 memory controller right? Except it is IMC! This is probably the reason for the AMD buy out rumor . But intel and ATI have already made a deal. On this tech.


Here's A link that has no real meaning other than the quote I am pulling from it . This is what the buy out rumors are all about.

http://www.theinquirer.net/?article=32125


We've long puzzled at the exact nature of the deal ATI and Intel have had for many years, which as far as we can comprehend it, is something to do with cross licensing of graphics technology.

Me again! Here,s the kicker. This is the reason for all the fuss. Intel and AMD have a tech sharing agreement. Following me now. ATI and AMD have no such agreement.

If Intel Licenses this tech. From ATI . AMD can't use it. Now it should all be falling into place for everyone. Hell for all we know Intel either helped ATI develop this tech or gave it to ATI so they could Licenses it . So AMD couldn't get their grubby little hands on it.

As I said in another thread on this subject . There's more at stake here than meets the eye.
 
To keep this alive waiting On Poncho to come in . I want his opinion on the above post.

Nehalem mid 2008 is along time to wait and see what Intel gives us for an IMC.
 
$BangforThe$ said:
Come on Donnie I know you can same something . About Intels Or should I say ATI'S IMC
Click to expand...


I really can't speculate on ATI doing an IMC design or the relationship between ATI and Intel. I really don't know. I haven't heard anything.... but I would imagine those lines of dicussions are VERY secret. What I can say is that Intel is going to an IMC design... their OWN IMC. While ATI makes ok chipsets... I doubt Intel would let somebody, with a fraction of Intels resources, design a part that is crucial to the performance/stability of Intel platorms. Wouldn't make sense.
 
You must log in or register to reply here.
Back
Top