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L1 and L2 Caches

Myorthos

n00b
Joined
Jun 21, 2004
Messages
31
I'm studying for my A+ cert, and I was reading about some processors, and it says that the L1 cache is the CPU's internal cache, while the L2 cache was an external cache on the motherboard. It then proceeded to tell me that both the L1 and L2 caches were integrated in to most modern CPUs. So whats the difference between the L1 and the L2 cache if they're both internal caches now, and what does each specifically do?

Thanks
 
L1 cache is the cache closest to the processor. L2 is the next level "out." Cache goes all the way up to L4, and some people argue that L5 and L6 are the system memory and harddrives.

I don't think there is an integrated L4 cache on any processor.

http://www.tweakers.net/ext/i.dsp/1084211988.jpg

This is a good juxtaposition of L2 cache and L1 cache. That's an image of the Dothan core, also known as the Pentium M. The huge matrix of rectangles on the left is the L2 cache. I *think* the L1 cache is composed of those smaller, gridlike rectangles, with one "horizontal" near the top center and one "vertical" towards the bottom-center-right.

So, the caches are places where the CPU can quickly store codes and retrieve them with minimal latency, as opposed to using system ram where you have to go through a northbridge (on intel and older AMD systems). In some cases, the more on die cache, the better, but there are issues with larger caches. For one, the latency tends to take a dump with cache's over 1 mb. Also, it's expensive to have that many transistors on each CPU.
 
L1 is closest, smaller, and significantly faster. L2 is bigger but slower. L3 shows up on occasion but it's moderately pointless except to make Intel money (marketing gig). Even the slower L2 is many times faster than the fastest system memory, being part of the CPU and all.
 
ashmedai said:
L1 is closest, smaller, and significantly faster. L2 is bigger but slower. L3 shows up on occasion but it's moderately pointless except to make Intel money (marketing gig). Even the slower L2 is many times faster than the fastest system memory, being part of the CPU and all.

L3 caches of 12 megs are seen on the Itanium2. I wonder what performance gain there is between a 12mb L3 cache Itanium and, say, a 4mb L3 cache Itanium? Seems like that extra 8mb of cache could make at least 4 more CPU's, hahaha.
 
I think L1 is physically part of the actual CPU die, but L2, while still being onboard cache in modern processos, is not a part of the CPU die. I'm not exactly sure of the big functional difference between L1 and L2, but L1 is a faster cache than L2 because it is typically made from a more expensive SRAM, and as such processors have less L1 cache than L2.

General purpose of cache, however, is to reduce memory access time, I believe.

edit: L3 just doesn't exist in chips like the Pentium EE or Itanium. I think in the past, L3 was what L2 used to be, external to the processor and located on the motherboard.
 
BillLeeLee said:
I think L1 is physically part of the actual CPU die, but L2, while still being onboard cache in modern processos, is not a part of the CPU die.
L2 cache is most certainly on the same die as L1 cache and the rest of the circuits that comprise a modern processor. It's been this way for nearly a decade.
 
BillLeeLee said:
I think L1 is physically part of the actual CPU die, but L2, while still being onboard cache in modern processos, is not a part of the CPU die. I'm not exactly sure of the big functional difference between L1 and L2, but L1 is a faster cache than L2 because it is typically made from a more expensive SRAM, and as such processors have less L1 cache than L2.

General purpose of cache, however, is to reduce memory access time, I believe.

edit: L3 just doesn't exist in chips like the Pentium EE or Itanium. I think in the past, L3 was what L2 used to be, external to the processor and located on the motherboard.

http://www.extreme-pc.ca/imagegallery/S755-core-image-1.jpg

That's a Gallatin core. The very top is the L3 cache. It looks like there is somewhat of a parition between it and what may be the L2, but the L2 should only be 512kb, and the top and bottom sections are very close in size. Though, if the 2mb section of "L3" cache operates at a different latency than the "L2" cache, then it is indeed a different level of cache.

edit: after looking through intel specs, it looks like the difference between the L2 cache and L3 cache on Gallatin cores is that L2 has ECC, whereas L3 apparantly does not. This would result in very different timings on these caches.
 
L1 cache is most important.

Imagine to have a chip equipped with 2 or 3 MB L1 cache.

But there is a reason why chip makers are having difficulty getting the L1 pocket having that much. There are technical reasons.... know what i mean?
 
Myorthos said:
I'm studying for my A+ cert, and I was reading about some processors, and it says that the L1 cache is the CPU's internal cache, while the L2 cache was an external cache on the motherboard. It then proceeded to tell me that both the L1 and L2 caches were integrated in to most modern CPUs. So whats the difference between the L1 and the L2 cache if they're both internal caches now, and what does each specifically do?
This is the problem with the A+ test - they expect you to learn & memorize outdated shit that is completely useless (and often no longer correct).
 
L1 cache contains both code and data. L2 is just data.

While L1 and L2 cache in modern processors might both be on the same die, the L1 cache is integrated with the -pipeline and the instruction decoding unit and the L2 cache is (at least architecturaly) a layer away from the decoding logic. This isn't something anyone is going to suss-out by looking at photomicrographs of die images.

L2 latency, then, is about an order of magnitude longer than L1 latency.

The definitive reference for this topic (for Intel processors, at least) is IA-32 Intel® Architecture Software Developer’s Manual Volume 1: Basic Architecture. Section 2.2 explains the caching microarchitecture.
 
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