IPC fanatics: a nice reference

pxc

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I saw this on another board. The chart on the right shows per generation and cumulative IPC improvements from Dothan to Broadwell:

jzif45o.png


Note that IPC improvements have been fairly linear, contradicting the claims that Intel is artificially holding back performance on new uarchs. I do agree that Intel could be cranking the clock speeds up a bit if it chose to target that in design, but that's a different issue.
 

Tsumi

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And if Ivy Bridge didn't have the modest jump that other ticks usually don't get, Haswell would be in line with the ~15% jump. Tock to tock, Intel is still on track for ~15% each generation (I count generation as tock to tock, not tock to tick or tick to tock).
 

lazz

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The last 4 generations show a pretty consistent gain of ~10% on Tick and ~6% on Tock..

Hopefully Skylake continues this with a min. ~10% IPC increase.
 

Tsumi

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The last 4 generations show a pretty consistent gain of ~10% on Tick and ~6% on Tock..

Hopefully Skylake continues this with a min. ~10% IPC increase.

You have the tick and tock reversed ;)

Tock is architecture change. Tick is the die shrink.
 

Liger88

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You have the tick and tock reversed ;)


And you have your rough estimations off. It's more like a consistent 3-5% on average and 5%+ on some applications/benchmarks. The gains have been like molasses since Sandy Bridge and at this rate it would take as long as Moore's Law has been around just to double the performance of existing chips on average.
 

aphexcoil

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The last 4 generations show a pretty consistent gain of ~10% on Tick and ~6% on Tock..

Hopefully Skylake continues this with a min. ~10% IPC increase.


Everything I've read so far seems to put Skylake between 8-15% IPC increase. The GPU should be 50% faster than Broadwell. Combined with the other architectural changes and hopefully a return to solder and Skylake may be our Sandy Bridge II.
 

plugwash

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One thing I notice is that according to that chart (as always take vendor charts with a pinch of salt) the earlier generations had a big gain on the tock and little to no gain on the tick while with more recent generations the improvement has been spread between tick and tock.

Also the massive IPC improvement when the pentium 4 was abandoned is not on the chart.
 

pxc

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One thing I notice is that according to that chart (as always take vendor charts with a pinch of salt) the earlier generations had a big gain on the tock and little to no gain on the tick while with more recent generations the improvement has been spread between tick and tock.

Also the massive IPC improvement when the pentium 4 was abandoned is not on the chart.
Well, no. The slide deck and slide title clearly have to do with the Core uarch, so it's not going to include the abandoned and unrelated Netburst.

There is something missing from the chart and is why there is such a large jump between Dothan and Merom (Core 2): Yonah, based on Banias/Dothan, was the first processor to carry the Core name (Solo and Duo models). Yonah had a 5-10% IPC improvement vs Dothan. If it were inserted into the chart in the proper place between Dothan and Merom, Merom would not have such a large jump. Nehalem gets a bigger than average Tock cycle IPC bump largely because it added an IMC. Going from a FSB based memory controller to an IMC is a one time trick.

I think Yonah was deliberately removed because it messed with the concept of Tock cycles getting large bumps since Yonah was a Tick cycle that had improvements about equal to the Tock cycle of Merom. With the chart fixed, the only unusually high IPC bump on a Tock cycle would be Nehalem, and that's mostly due to the IMC.
 
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aphexcoil

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I think Yonah was deliberately removed because it messed with the concept of Tock cycles getting large bumps since Yonah was a Tick cycle that had improvements about equal to the Tock cycle of Merom. With the chart fixed, the only unusually high IPC bump on a Tock cycle would be Nehalem, and that's mostly due to the IMC.

When did Intel officially begin their tick-tock cadence?
 

pxc

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When did Intel officially begin their tick-tock cadence?
It was announced to the public in early 2007 iirc, but may have been an internal goal earlier given how many products were already in various stages of development for release every 12 or so months.

Unofficially the first tick seems to be Yonah, followed by Merom 6 months later and the tick tock strategy was announced to the public about 6 months after that.
 

XoR

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Wasn't it after Prescott fiasco ?
Core 2 Duo were in some tests twice as fast as Pentium D with the same clock speed.

I changed Pentium D 805@3.6GHz to Pentium E2140@3.166GHz and difference was sorta ridiculous. It was last processor change where I really felt the difference in desktop usage.

BTW. Did Intel really at some point claimed that Skylake will be as much of a difference to a Hashwell as Merom was to Netburst?
 

aphexcoil

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I would love to see a similar chart of performance per watt.

That would be very interesting to see. I suspect that increase has been far greater.

I found this chart on Wikipedia's article "Performance per Watt"

720px-Green500_evolution.svg.png

Exponential growth of supercomputer performance per watt based on data from the Green500 list. The red crosses denote the most power efficient computer, while the blue ones denote the computer ranked#500.

As of June 2012, the Green500 list rates BlueGene/Q, Power BQC 16C as the most efficient supercomputer on the TOP500 in terms of FLOPS per watt, running at 2,100.88 MFLOPS/watt.[4]

On 9 June 2008, CNN reported that IBM's Roadrunner supercomputer achieves 376 MFLOPS/watt.[5][6]

In November 2010, IBM machine, Blue Gene/Q achieves 1,684 MFLOPS/watt.[7][8]

As part of Intel's Tera-Scale research project, the team produced an 80 core CPU that can achieve over 16,000 MFLOPS/watt.[9][10] The future of that CPU is not certain.

Microwulf, a low cost desktop Beowulf cluster of 4 dual core Athlon 64 x2 3800+ computers, runs at 58 MFLOPS/watt.[11]

Kalray has developed a 256 core VLIW CPU that achieves 25,000 MFLOPS/watt. Next generation is expected to achieve 75,000 MFLOPS/watt
 
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pxc

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I would love to see a similar chart of performance per watt.
It would mostly be bounded somewhere between 1x and 2x steeper than the line in the graph I posted for single threaded power consumption in legacy software due to design/power goals Intel adopted for Core.

For something that's more comparable to the Green500 graph above (likely based on LINPACK), you wouldn't be comparing legacy software performance and one thread like the legacy software performance slide shows. The data points for a performance/W graph from Dothan to Broadwell would look quadratic or exponential due to newer SIMD extensions, higher bandwidth cache/memory subsystems and higher thread counts, while power steadily decreased per core.

For something actually meaningful, it would take a wide variety of apps representing typical usage, while tracking energy used for the task at the CPU socket level. That's not very easy to do.
 
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