Intel Xe HPC Multi-Chip Module Pictured: "Xe-HPC alias Ponte Vecchio"

erek

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"There appear to be two kinds of on-package memory on the Xe HPC. The first kind is HBM stacks (from either the HBM2E or HBM3 generation), serving as the main high-speed memory; while the other is a mystery for now. This could either be another class of DRAM, serving a serial processing component on the main logic die; or a non-volatile memory, such as 3D XPoint or NAND flash (likely the former), providing fast persistent storage close to the main logic dies. There appear to be four HBM-class stacks per logic die (so 4096-bit per die and 8192-bit per package), and one die of this secondary memory per logic die."

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https://www.techpowerup.com/277749/intel-xe-hpc-multi-chip-module-pictured
 
This is really interesting, I look forward to more news on this.
 
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I am incredibly interested in those corner I/O blocks. Viable and well performing MCM based GPU designs have so far eluded both AMD and NVidia because of their inability to nail down specific IO latency issues and process scheduling / dispatch delays. If Intel is the first to pull this off I will laugh.
 
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