HardOCP News
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At SC11, Intel Corporation revealed details about the company’s next-generation Intel Xeon processor-based and Intel® Many Integrated Core (Intel® MIC)-based platforms designed for high-performance computing (HPC). The company also outlined new investments in research and development that will lead the industry to Exascale performance by 2018. During his briefing at the conference, Rajeeb Hazra, general manager of Technical Computing, Intel Datacenter and Connected Systems Group, said that the Intel Xeon processor E5 family is the world’s first server processor to support full integration of the PCI Express 3.0 specification**. PCIe 3.0 is estimated** to double the interconnect bandwidth over the PCIe* 2.0 specification** while enabling lower power and higher density server implementations. New fabric controllers taking advantage of the PCI Express 3.0 specification will allow more efficient scaling of performance and data transfer with the growing number of nodes in HPC supercomputers.
“Knights Corner,” the first commercial Intel MIC architecture product, will be manufactured using Intel’s latest 3-D Tri-Gate 22nm transistor process and will feature more than 50 cores. When available, Intel MIC products will offer both high performance from an architecture specifically designed to process highly parallel workloads, and compatibility with existing x86 programming model and tools.
“Knights Corner,” the first commercial Intel MIC architecture product, will be manufactured using Intel’s latest 3-D Tri-Gate 22nm transistor process and will feature more than 50 cores. When available, Intel MIC products will offer both high performance from an architecture specifically designed to process highly parallel workloads, and compatibility with existing x86 programming model and tools.