"Intel forges ahead to 10nm, will move away from silicon at 7nm"

pxc

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Ars previews Intel's presentation about 10nm and beyond at ISSCC 2015: http://arstechnica.com/gadgets/2015...d-to-10nm-will-move-away-from-silicon-at-7nm/

Going with a III-V material as speculated in the article at 7nm is a strong bet. I think the end of silicon proclamation (even at 7nm) may be a little premature since there are ways of continuing to use it as a base substrate with III-V materials embedded in it.

Anandtech has a longer article: http://www.anandtech.com/show/8991/...ng-the-benefits-of-14nm-and-going-beyond-10nm
 
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"but due to continued problems with EUV deployment, it sounds like Intel is planning to do both 10nm and 7nm without it."

I think it also has to do with the problems with 450mm wafers- no one wants to develop the machines required to do these processes. Intel may be like "yeah we'll spend $2B on EUV tools but it has to be exclusive to us" and the response they get back is "no".
 
Intel's D1X development fab, which is supposed to come online later this year, is built around 450mm wafer processing. And yeah, Intel had to pay a lot to be first and not because it bought exclusivity. It was just too expensive for most other foundries.

EUV is just a mess. Problems with power output have plagued it for years. Eventually it will have those issues solved, but Intel doesn't forecast that happening before it gets into 7nm development. That doesn't mean EUV tools won't be ready by the time Intel releases 7nm. It just means that planning and development for 7nm won't coincide with near production quality EUV tool availability. lol @ the idea that EUV tool makers wouldn't take billions from the first sucker to beta test a problematic device.
 
"but due to continued problems with EUV deployment, it sounds like Intel is planning to do both 10nm and 7nm without it."

I think it also has to do with the problems with 450mm wafers- no one wants to develop the machines required to do these processes. Intel may be like "yeah we'll spend $2B on EUV tools but it has to be exclusive to us" and the response they get back is "no".


Pretty much the entire semi-industry seems to have given up on EUV entirely at this point. Intel's been kind of just bah-humbug about it after sinking hundreds of millions into the development and a decade plus of failures.

450mm wafers have more of a chance seeing the light of day, but even that's running into issues that probably wont get solved quickly because they're also running into shrinkage issues. The semi-industry seems to be having more holes popping up than technologies readily available to plug them.

I'd be holding my breath on 10nm in 2016 (wouldn't be surprised if its 2018) let alone 7nm and beyond coming to fruition. Silicon still has decades left, just not in the way people think.
 
EUV is just a mess. Problems with power output have plagued it for years. Eventually it will have those issues solved, but Intel doesn't forecast that happening before it gets into 7nm development. That doesn't mean EUV tools won't be ready by the time Intel releases 7nm. It just means that planning and development for 7nm won't coincide with near production quality EUV tool availability. lol @ the idea that EUV tool makers wouldn't take billions from the first sucker to beta test a problematic device.

Yep EUV is not only a mess it is not cost competitive with multipatterning using 193. That's the main issue. Most companies are looking at multiple exposure LE^N to keep going forward. I've posted about EUV before here and what a clusterfuck it is. If people are interested I can go dig it up.
 
Yep EUV is not only a mess it is not cost competitive with multipatterning using 193. That's the main issue. Most companies are looking at multiple exposure LE^N to keep going forward. I've posted about EUV before here and what a clusterfuck it is. If people are interested I can go dig it up.

If you have newer stuff about EUV that would be good to read, then I'm all for it.

Personally I don't think EUV is an option going forward, but a few people keeping bringing it up and keeping the idea fresh in the community.
 
It's the most "mainstream" of the next gen lithography techniques, by that I mean in terms of development and public awareness, and so it will get the most mention.

EUV is not the only option being explored currently going forward. I think it's been mentioned that Intel is also looking into DSA (directed self assembly) and multi-beam lithography has alternatives to EUV and has investments in companies involved in both techniques.
 
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