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Intel chips and on-chip memory controllers
- Thread starter vsrdan
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(cf)Eclipse
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which is kinda sad, because it will definitly add a substantial amount of performance if they did. most of the performance that K8 has over K7 comes from the memory controller, no questionBao01 said:
It's not that they are too chicken, but more of they want flexibility when it comes to RAM standards. They are making CSI which is to be used with an integrated memory controller in about two years. Until then, we'll see boosts in the FSB for performance boosts.Bao01 said:
(cf)Eclipse said:
True, I can see why a high latency m-arch like the prescott wouldn't benefit much from a memory controller as it lowers the latency by just a smidgen. A low latency m-arch like the Merom would probably benefit as much as K8 over K7 from an onboard memory controller.
Duke3d87 said:
Duke, they got burned with Rambus. They want to have the same flexibility so if Taiwan gets owned by an earthquake or godzilla again or something jacks up the price on DDR2, they can react in time. In other words, they're afraid of making the same mistake again.
Also you have to look at Intel's target buyer.... the average consumer. The average consumer who is happy with on-board graphics, especially now that there is pretty good performance out of on-board. Now... look at it like this, current GMCH's are pushing the threshold for passive cooling, and if you slap that onto the CPU you will get a great deal of heat. Now, you can go with an on-board graphics chip, but that would increase the cost and give you VERY shitty performance or you could always have to have a video card which would increase the cost for the consumer. And all of this would be for fairly limited performance benefit. Just not worth it.
Oh... and you'll see CSI in a couple years on Server platforms, it'll be another couple after that, if at all, for desktop.
Oh... and you'll see CSI in a couple years on Server platforms, it'll be another couple after that, if at all, for desktop.
Poncho said:
I've heard that argument made a number of times but I can't rationalize it with NGMA. First off, the on-board graphics will is a red-herring. That's not how AMD's system works so I would not expect the same problem with Intel's. Second, the argument made against performance worked before. It doesn't work now with NGMA. Would not an additional 10-15% be worth it?
$BangforThe$
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Well lets just wait and see how ondie memory controller works with AM2 . As I undestand it . I really don't see it as an advantage once you get to a certain point. I could be wrong . But if you really think it threw at higher band widths it really shouldn't figure in.
Someone with my educational background really shouldn't have to explain this as Academaks(academic) seem to read a lot and really don't understand real world concepts.
Look at it this way with ddr 400 AMD with its ondie controller just wipes the floor against Intel and their onboard controller. It's is a huge differance . This differance is based on latincey.
(experiance in the manufactutoring arena using vision add sorters is were I form my opion from) Now lets assume that in real world that latincy between the 2 is a constant.
If that is a true statement. Than as bandwidth is increase you should see deminishing returns on that constant(latincy)
So when AM2 comes out with DDR2 the ondie memory controller well automaticly see a latincy increase that is inherent to DDR2. If latincy is a constant as I stated AM2 @DDR2 667 should see a performance drop. Am2 can overcome this constant only threw hirer bandwidth. But that hirer bandwidth as we converse adds more latincy. SO I believe that as Intel improves the onboard latincy . Amd DDr2 adds latincy theres a point were the latincy that at one time benefited amd can easily be overcome buy higher bandwidth.
So the ondie memory controller that once benefited AMD will now hender them .
The reason for this is very simple comcept to understand.
To increase bandwidth Intel simply has to change onboard memory controller. Where as AMD has to change its cpu arch.
I know what I wrote is a bit muddled . Let me explain in a differant way.
AT ddr400 AMD is faster than intel because of latency.
Intel needed to increase bandwidth to compete with amd . But because DDR2 has even more latency Intel needed to go higher and higher on bandwidth to overcome that latincy.
AT about DDR2 667 Intel was finely able to match and beat ddr400 low latincy . Now at higher bandwidth intel was able to close the performance gap.
Since DDR could only go so far. AMD had to switch to DDR2 because intel was eroding its advantage. . And this is were ondie memory controller runs into its problems. DDR2 has more latincy.
As I already said the latincy between ondie and onboard should be a constant.
Now this is were the tables turn. Intel can go to higher and higher bandwidth much easier than amd can.
When I say latency is constant between ondie and onboard thats all I am referring as being a constant. Yes a do know small improvements can be made but AMD ondie Vs Intels onboard well always be an advantage to AMD but that is a constant( minus small improvements )
Intel and Amd are dragsters
Both running ddr400 Bandwidth= horsepower
At DDR 400 easy win for AMD . AMD is running a better gear ratio
Intel puts in more horse power goes to DDr2 . But they also had to change gear ratio
Amd still wins but elapsed times are now closer. Because AMD has a better engine.They still win.
Now Intel redesign's their engine.
Conroe comes to the line at 2.6ci. running 667hp. with 1066 gear ratio
X2 comes to the line at 2.8ci. running 400hp with a 400 gear ratio.
Conroe blows the doors off X2 Even though conroe didn't have there big ci. engine installed
Rematch Conroe comes to the line at 3.0ci running 800hp with a 1333gear ratio
Amd comes to the line with more powerful ignition system = to conroe still at 2.8ci but with more 800hp and an 800 gear ratio
Conroe complete destroys X2 as X2 runs a higher et because they couldn't handle the gear change from 400 to 800 ratio . just not enough rpms for the AMD engine to pull the new gear ratio. Conroe set a new world speed recorded shattering the old record by 50%
Someone with my educational background really shouldn't have to explain this as Academaks(academic) seem to read a lot and really don't understand real world concepts.
Look at it this way with ddr 400 AMD with its ondie controller just wipes the floor against Intel and their onboard controller. It's is a huge differance . This differance is based on latincey.
(experiance in the manufactutoring arena using vision add sorters is were I form my opion from) Now lets assume that in real world that latincy between the 2 is a constant.
If that is a true statement. Than as bandwidth is increase you should see deminishing returns on that constant(latincy)
So when AM2 comes out with DDR2 the ondie memory controller well automaticly see a latincy increase that is inherent to DDR2. If latincy is a constant as I stated AM2 @DDR2 667 should see a performance drop. Am2 can overcome this constant only threw hirer bandwidth. But that hirer bandwidth as we converse adds more latincy. SO I believe that as Intel improves the onboard latincy . Amd DDr2 adds latincy theres a point were the latincy that at one time benefited amd can easily be overcome buy higher bandwidth.
So the ondie memory controller that once benefited AMD will now hender them .
The reason for this is very simple comcept to understand.
To increase bandwidth Intel simply has to change onboard memory controller. Where as AMD has to change its cpu arch.
I know what I wrote is a bit muddled . Let me explain in a differant way.
AT ddr400 AMD is faster than intel because of latency.
Intel needed to increase bandwidth to compete with amd . But because DDR2 has even more latency Intel needed to go higher and higher on bandwidth to overcome that latincy.
AT about DDR2 667 Intel was finely able to match and beat ddr400 low latincy . Now at higher bandwidth intel was able to close the performance gap.
Since DDR could only go so far. AMD had to switch to DDR2 because intel was eroding its advantage. . And this is were ondie memory controller runs into its problems. DDR2 has more latincy.
As I already said the latincy between ondie and onboard should be a constant.
Now this is were the tables turn. Intel can go to higher and higher bandwidth much easier than amd can.
When I say latency is constant between ondie and onboard thats all I am referring as being a constant. Yes a do know small improvements can be made but AMD ondie Vs Intels onboard well always be an advantage to AMD but that is a constant( minus small improvements )
Intel and Amd are dragsters
Both running ddr400 Bandwidth= horsepower
At DDR 400 easy win for AMD . AMD is running a better gear ratio
Intel puts in more horse power goes to DDr2 . But they also had to change gear ratio
Amd still wins but elapsed times are now closer. Because AMD has a better engine.They still win.
Now Intel redesign's their engine.
Conroe comes to the line at 2.6ci. running 667hp. with 1066 gear ratio
X2 comes to the line at 2.8ci. running 400hp with a 400 gear ratio.
Conroe blows the doors off X2 Even though conroe didn't have there big ci. engine installed
Rematch Conroe comes to the line at 3.0ci running 800hp with a 1333gear ratio
Amd comes to the line with more powerful ignition system = to conroe still at 2.8ci but with more 800hp and an 800 gear ratio
Conroe complete destroys X2 as X2 runs a higher et because they couldn't handle the gear change from 400 to 800 ratio . just not enough rpms for the AMD engine to pull the new gear ratio. Conroe set a new world speed recorded shattering the old record by 50%
$BangforThe$
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Since I did a bad job on the above post. I am hopeing this answers the the OP's question
Sorry OP someone just gave me this link . I didn't know AM2 had been reviewed . AMD changed their mind about the release . Since AMD is boring to me I don't follow them
http://www.tomshardware.com/2006/02/21/a_look_at_amds_socket_am2_platform/page9.html
Sorry OP someone just gave me this link . I didn't know AM2 had been reviewed . AMD changed their mind about the release . Since AMD is boring to me I don't follow them
http://www.tomshardware.com/2006/02/21/a_look_at_amds_socket_am2_platform/page9.html
Couple of years? AMD wants to launch a full out attack on Intel's 4P systems and have rapidly been eating away at their 4P market share. Paul Ontellini said that Intel did not want to use the memory controller b/c of costs and whatnot. The 45nm process based processors are not expected to double in cache. Tomshardware said that it would be 50% boosts in cache to 3-6 MB L2. That saves a lot of die space for CSI which only uses 12% of the die space. So logically would the move to not double the cache size hint at Intel's desire to use CSI in 2008?Poncho said:
Bao01 said:
You forgetting to look at Intel's target market.... the "dell type" consumer. Current Intel Graphics are GREAT for the average consumer and the performance from an "add in" chip on the board would be a step back. If you go the other way the consumer would have to tack on 100-200 dollars for a computer purchase. Just doesn't make sense.
Remember this EVERYBODY..... Intel DOES NOT give a shit about 90% of the people on these boards, myself included. You, nor I, are their target buyer.
That being said...
Bao01 said:
Going to an On-Die memory controller would hurt sales for a performance gain that the TARGET BUYER would not even notice. Just wouldn't make sense.
Poncho said:
No doubt, the bean counters will never let it happen(until it has to happen). But, apparently they underestimated the enthusiast market recently. Despite it being such a tiny segment, it makes a big stink. When given a chance, your average consumer would jump to ask a geek for their critique before making a purchasing decision....or the geek generally likes to volunteer stuff like that.
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If Intel really thought the market was that stupid, they could have made a hamster running a wheel the successor to Prescott and called it a day. They'll sell millions anyway, just because they're Intel.
Poncho said:
Ok, I still don't understand. Why would on-board graphics not be compatible with an on-die memory controller? There does not seem to be a compatibility issue between the nVidia's and ATI's and AMD's memory controller. This just implies that Intel would need to make some adjustments to the GMA.
$BangforThe$
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Bao01 said:
Ya I know but I was just trying to point out to the OP that Ondie memory can only take you so far. There is the advantage of lower latency. but the disadvantage of have to change your cpu when better memory solution comes along. Couple that with the fact the higher bandwidth really doesn't help much if you have to go to higher latency . Which really doesnt do anygood anyway if if the cpu can't use it anyway. .
I tried to show that with the dragster comparison . but i did a losey job with that.
So I figured these benchies of AM2 could show him that. Memory can take you only so far . its the cpu that is the workhorse and once your @100% thats the end of it.
$BangforThe$ said:
Yes, I read the dragster comparison. I understand. But, an analogy is a method of expression. It sucks as a tool for making an argument, if you don't mind me being blunt. The problem I see and probably everyone else sees probably is not in current performance gain, but in future scaling and bottlenecking. I don't know if you've read, but recently Intel has invested in some new chipset fabs that use outdated processes [by cpu standards]. I think some of those are going to use refurb parts cobbled together with some new stuff to save costs. They may not have a problem getting to 333fsb, but they may need more once penryn[this is what I care about] rolls around or quad cores [apparently what Duke cares about]. More importantly, to us [and as Poncho rightly pointed out, not to Intel], we might be seeing some overclocking handicaps in the not-too-distant future.
Anyway, alot of this is conjecture. Neither the article you linked nor the dragster analogy would help, I'm afraid.
Whatever, I don't care. I'm goin to bed
1c3d0g said:Oh yes, and I'm confident that with your extensive knowledge in this particular field, what you have to say on this matter is incredibly valueable to Intel Corporation...
Bean counters don't care how smart you are or how smart you think you are.
I've heard integrated memory controllers help performance. I've heard it doesn't help performance at all. I've heard if it helps it's not much we're only talking Nanoseconds of a difference so who knows.
I mean really to know for certain if integrated memory controllers help or not you would REALLY have to have identical systems set up, same MOBO, amount of ram etc. Same Gigahertz processor by the same company. One with an integrated mem controler and the other without. THEN do some benchies and see what happens.
Until then I'm not convinced that it does or doesn't help with performance and if it does I doubt it would be much.
I mean really to know for certain if integrated memory controllers help or not you would REALLY have to have identical systems set up, same MOBO, amount of ram etc. Same Gigahertz processor by the same company. One with an integrated mem controler and the other without. THEN do some benchies and see what happens.
Until then I'm not convinced that it does or doesn't help with performance and if it does I doubt it would be much.
With an on die memory controller it is possible to waste an entire die (processor and memory controller) due to some manufacturing defect that only affects the memory controller. It could have been a 4 GHz AMD, but the memory controller got screwed up. Off to the trash you go. Leme know how that DVD/VCR deck combo is working. I get the most yield by being able to exchange parts, change parts, and keep my good silicon. If the north bridge or south bridge don't work, I get one that does. If the memory controller don't work on an AMD, I get an entirely new chip. Wasting a perfectly good processor because the cheap memory controller went out seems kinda stupid to me.
I get the most yield by being able to exchange parts, change parts, and keep my good silicon. If the north bridge or south bridge don't work, I get one that does. If the memory controller don't work on an AMD, I get an entirely new chip. Wasting a perfectly good processor because the cheap memory controller went out seems kinda stupid to me. ICE_9 said:With an on die memory controller it is possible to waste an entire die (processor and memory controller) due to some manufacturing defect that only affects the memory controller. It could have been a 4 GHz AMD, but the memory controller got screwed up. Off to the trash you go. Leme know how that DVD/VCR deck combo is working.
You write this as if a memory controller is the only thing that can break an entire CPU.
The bottom line is that as total die area increases, yeilds decrease. So the issue isn't memory controller vs. no memory controller, it's all about die size.
When one adds a memory controller, one increases die size. But, CPUs with on die memory controllers don't need the same amount of cache to achieve the same perfomance. Intel likes to dump lots of cache on their CPUs to hide the latency of their FSB design. This is esspecially true in 4+ socket servers where Intel needs a 6MB cache to keep up with an opteron with 1MB.
If Intel were to add an on-die memory controller, they could decrease their cache while still getting a performance boost. With cache easily taking up 50%+ of the die area, Intel's yeilds would probably increase.
Let's face it, unless you want to talk about the ability to quickly change memory standards, there is no benifit to Intel's ancient FSB design. The fact that Intel is planning the switch eventually should be proof enough. They're just having trouble creating a whole new NGMA and a new CSI bus at the same time. They will copy AMD's controller as soon as they can.
please search Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna, Timna from google so that everyone know how Intel has already implemented this idea years before AMD did.
1c3d0g said:Huh?
So why do they "need" an on-die memory controller? I'm sure the Intel board of directors are jumping to hear what Mr.Bao01 has to say, eager to listen to your expert advice...
I never addressed you or anyone else except whomever I'm replying to. That is my right. Now, I'm not sure what you seek to accomplish with your inane insults. Clearly, you are out of line.
Intel needs an on-die memory controller. Why else are they developing CSI. For fun?
Whether they develop it now or later, they are going to spend money on it.
So, let me clear something up with you, since you are so darn sensitive you got your panties in a jam because of a few humorous expressions. There are two types of people: ones who are bean counters and ones who don't know beans. You clearly don't count beans. That's not a good thing.
Bao01 said:
All that is for the server market, which you'll see a board with it in about 2 years. Now... IF they decide to use it on the desktop, and that is a BIG IF, you'll see it a year or 2 after that. So.... you're going to be looking at 3+ years before you see an on-die memory controller on a desktop platform, if you see it at all.
Timna was cancelled before release.empoy said:
Cyrix had the first x86 processor with an integrated memory controller, I believe. The MediaGX processor integrated the memory controller, video and other north bridge functionality. Timna was going to be Intel's response. MediaGX flopped and Intel cancelled Timna. Cyrix sold the MediaGX to NatSemi, AMD later purchased it and still resells the MediaGX as the AMD Geode GX1.
---
edit: it's not a big deal that Intel lacks an integrated memory controller. The Dothan/Yonah/Conroe seem to be good at hiding latency vs the A64 and X2. The 2 biggest problems are addressed with Core: the FSB speed is increased a healthy amount and the cores can communicate without going through the FSB (applies to Yonah, too).
Harping on a lack of an integrated memory controller is reaching. Conroe seems to have the performance even without an integrated memory controller.
A point to point bus may be a factor in 4+ socket servers, but it matters little to the 98%+ share of single and dual socket desktops and servers. Both AMD and Intel will probably increase bandwidth (bus and memory) when quad cores are released.
Intel does a lot of research. Their R&D budget is freaking huge. Their have been many accomplishments and failures. Processors, chip sets, network processor, hell even Wolftrap never made it that far. In the end though, this rivalry has allowed processor speeds to jump from around 400-500 MHz in late 90's to well over 3.5 GHz. Micron technologies are heading into .045 um vs .19 um from around the early P4 and P3 processors. Does Intel need an on chip memory controller? Probably not right now. The core change is a really big step. P4 400 MHz FSB, to 533 FSB, to 800 and 1066FSB, Hyperthreading, Dual Core, all technologies developed of of one primary architecture. We are just now getting started on this new architecture. Sit back, enjoy the ride. It only gets better from here.
As for an on-chip memory controller, I dunno why they don't do it. Maybe Via or SiS could make a better memory controller. Hell, even Nvidia might have the magic key to unlocking even great processor jumps for the Netburst architecture. But, I can't do that with AMD. It's their controller and their rules. All these other companies can do is work with their chip and memory controller. It gives AMD their performance advantage over Intel. But leaves them currently with just DDR memory. I built early P4 systems on boards that supported PC133 and DDR standards. Their are boards with DDR and DDR2 standards with the current chips. My systems have moved forward due to innovation. Has yours?
As for an on-chip memory controller, I dunno why they don't do it. Maybe Via or SiS could make a better memory controller. Hell, even Nvidia might have the magic key to unlocking even great processor jumps for the Netburst architecture. But, I can't do that with AMD. It's their controller and their rules. All these other companies can do is work with their chip and memory controller. It gives AMD their performance advantage over Intel. But leaves them currently with just DDR memory. I built early P4 systems on boards that supported PC133 and DDR standards. Their are boards with DDR and DDR2 standards with the current chips. My systems have moved forward due to innovation. Has yours?
$BangforThe$
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As far as AM2 goes it would seem that AMD doesn't no were their going with this or Fudo . Prints info but lacks Recall. As I understand it AMD is working with Rambus (a target of AMD fans not to mamy years back.Puts SHOE on other foot) and the Rambus memory tech supports DDr DDR2 And DDR3 .A differant socket may however be required.
This is Fudo's latest greatest insight into the world of a AMD. This guy comes up with some good stuff but really lacks recall as he reported sometime ago that AMD was working with Rambus. If you follow rambus you know that its controller works with DDR DDR2 and DDR3. This changes nothing so far as AMD performance goes until you get to a 4core AMD processsor as AMD is not Bandwidth limited.
http://www.theinquirer.net/?article=30252
This is Fudo's latest greatest insight into the world of a AMD. This guy comes up with some good stuff but really lacks recall as he reported sometime ago that AMD was working with Rambus. If you follow rambus you know that its controller works with DDR DDR2 and DDR3. This changes nothing so far as AMD performance goes until you get to a 4core AMD processsor as AMD is not Bandwidth limited.
http://www.theinquirer.net/?article=30252