Unless you can qualify this statement with something more than "happy" and "not happy", kindly stop blowing smoke to make yourself seem intelligent. Start talking about current density, carrier lifetime and channel length and I'll start listening.
This is correct, for all intents and purposes, but doesn't explain why.
Marginally correct, but very poorly worded. The P4 was designed, IIRC, to "reach 10GHz", thus the insanely long pipeline design. The premise that the clock speed will continue to rise with more voltage and cooling breaks down, however, due to electromigration. The increase voltage causes a square-relationship in the amount of current, and eventually, the metal will move to due the current. This will occur far before 10GHz, however.
If you've read these forums for more than six picoseconds, you'd know that "smart overclocking" is something that nearly everyone here is aware of and practices normally. I really don't see how this new "Intel smart overclocking" has much to do with memory, which is what the OP was wondering about, also which in case you didn't know is manufactured with a *completely* different process than an intel CPU.
This makes no sense at all. You're missing words .. and content. What is the new architecture limited by? The articles don't particularly say, at least not on the pages you linked. What is the manufacturing process limited by? The article doesn't mention that at all, and I highly doubt they would even know. How is the number of transistors related to function, process or design? You can group memory and CPU together *very* loosely by categorizing the number of transistors. After that, your comparison falls apart.
You can overclock anything as far as you want. It won't work right after a certain point but you won't break it. Extremely overvolting and poorly cooling your hardware will cause it damage. All semiconductors are directly affected by heat, voltage and power delivery; qed your premise is completely incorrect. For the purposes of overclocking, memory speed is limited by heat, voltage and design, in increasing order of relevance. Process size has very little to do with it, as memory hasn't gotten to 65nm yet so that comparison is utterly irrelevant. In fact, due to its very nature, process size for memory is nearly irrelevant. Most current memory I believe is at 110 or 90nm. There is no need for anything smaller as if yet.
Thank you for explaining what I was getting at, only way better and more eloquently than I ever could have.... That's what I like about this place. People smarter than me that I can learn from! You're explanation makes a LOT of sense and I have personally seen empirical data to back up what you've said. Thanks for helping clear this mess up on this thread, which is, as you said, about memory, not CPUs.