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http://www.xtremesystems.org/forums...neering-sample-landed-on-my-desk-today./page4
Looks like 1 HOT SOB
Looks like 1 HOT SOB
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The temps, IBT results, and voltage used don't match up. I think that Intel ES 3770k was designed to fail. I'd wait on official release before putting to much trust in experiences like the ones found in that thread.
Yeah, there could be any number of issues.
However, when running at a similar power when overclocked as say some Sandy Bridge processor (likely different speeds to get the same power consumption), IB will certainly run at a higher temperature given similar conditions like same ambient temp and same cooling.
The reason is the same as previous chips that underwent a die shrink. A 216mm^2 chip such as 4c Sandy Bridge can dissipate to the heat spreader better than a ~161mm^2 4c IB due to the 25% decrease in area on IB.
Yeah, there could be any number of issues.
However, when running at a similar power when overclocked as say some Sandy Bridge processor (likely different speeds to get the same power consumption), IB will certainly run at a higher temperature given similar conditions like same ambient temp and same cooling.
The reason is the same as previous chips that underwent a die shrink. A 216mm^2 chip such as 4c Sandy Bridge can dissipate to the heat spreader better than a ~161mm^2 4c IB due to the 25% decrease in area on IB.
so with all things considered, if the chip is doing the same amount of work as a Sandy Bridge, how can it be putting out more heat with a lower TWP?
Total heat dissipation for the entire chip should be lower than 32nm, correct? Even if it's being reported at 80 C. directly on the die, the chip as a whole shouldn't be getting any hotter on the surface where the heat sink does its work.
The Tri-gate transistors are supposed to be more efficient than the planar ones. I'm not entirely convinced the measurements are correct. I've never seen a greater higher heat output for the same speed chip with a smaller fab process. The maximum TWP of these chips is supposed to be less than Sandy Bridge as well -- so with all things considered, if the chip is doing the same amount of work as a Sandy Bridge, how can it be putting out more heat with a lower TWP?
I little bit better result here... 5Ghz with under 80deg temps, cooled with fan-less heatsink...!
Probably the die just isn't making good contact with the IHS. This is an engineering sample.
He said die and IHS (internal heatspreader). He said nothing about the heatsink.Nah these guys know they're shit, they mounted and re mounted the heatsink and im sure if the surface was un level they would've lapped it.
Nah these guys know they're shit, they mounted and re mounted the heatsink and im sure if the surface was un level they would've lapped it.
He said die and IHS (internal heatspreader). He said nothing about the heatsink.![]()
im sure if the surface was un level they would've lapped it.
Nah these guys know they're shit, they mounted and re mounted the heatsink and im sure if the surface was un level they would've lapped it.
Looks like that thread got blackholed. What was the skinny?
You'd probably be surprised to learn that marketing in large tech companies often has very technical groups/departments.Marketing don't know jack about hardware, no surprise.
I didn't read most of the thread. Woooossshhhhhhh, right over my head.No I wouldn't be surprised - you know I was kidding right?
It was a loaner ES that needed to be returned to Intel. My guess is that Intel had it designed to only operate at stock clocks and not for over clocking.
No I wouldn't be surprised - you know I was kidding right? I followed the thread before it was shut down. he was using a good air cooler and knew what he was doing. Something wrong in the sample or the reporting.
Pelo - thats to be expected though, you just gotta get around that heat somehow.