I can't really elaborate without overstepping my limits. But I will say that management has said that even if anything else has to be cut, R&D and marketing will be kept up.
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I wish AMD would do this
- Thread starter colinstu
- Start date
I can't really elaborate without overstepping my limits. But I will say that management has said that even if anything else has to be cut, R&D and marketing will be kept up.
That's simple common sense.
Manny Calavera
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I've heard this sort of stuff a lot.
People seem to think that GPUs have much better floating point units than CPUs... Why do you think that? Because the raw GFLOPS ratings look impressive?
That's just because they have a massively parallel architecture. An individual FPU on a GPU is not all that fast, really. Neither ATi nor NV have the sophisticated technology that Intel and AMD have. In fact, you probably don't even want to have that in a GPU. In a massively parallel architecture it may be better to have simple, less efficient units, but be able to just put a lot more of them on a chip and/or clock them much higher.
As for using a parallel FPU architecture as part of an x86 chip... In theory it's possible, but it would require a specialized instructionset, and therefore you cannot have software compatibility. That's an excellent reason NOT to add such an architecture to your CPU. You'll waste a lot of transistors on something that won't have any software support in the first few years of its existence. You'd be better off just adding x86 cores or larger caches, and get an instant performance boost.
Other than that I'm not convinced that integrating such a unit inside an x86 chip will actually make that much of a difference. A modern videocard already has its own memory and cache, which is actually much faster than the main memory of a PC, and via the PCI-e bus, it can already communicate with main memory and the CPU at high speeds. The actual calculations will always have some kind of batch-character, because you will by definition be performing a set of calculations in parallel.
The only benefit I would see on an integrated system is possibly lower setup overhead on the batch. But that will only be a bottleneck on small calculations. On the other hand, an integrated chip with shared memory will most probably be slower on larger calculations.
what seems wierd to me about the phenom is that the saw the need to give each core 2mb of L2... and then squeeze all of this L2 thought 2mb of L3.... something just dosent seem right there.. your going form , let say 2 gb of system memory, to 2 mb of shared L3 to 8/4 MB of dedicated L2...
/theroy
the chip as it stands now is wider than it is tall.
take on some ati tech... drop the L3 as it is now, in that space, replace it with ati's ring buss controller, square out the chip by putting 256mb of ddr4 spec ram on the die. within the ring buss, each processor will have 4 64bit pathways between the L2 and L3
and yeah.. 4mb per core would be nice...
mmm tasty
/theroy
the chip as it stands now is wider than it is tall.
take on some ati tech... drop the L3 as it is now, in that space, replace it with ati's ring buss controller, square out the chip by putting 256mb of ddr4 spec ram on the die. within the ring buss, each processor will have 4 64bit pathways between the L2 and L3
and yeah.. 4mb per core would be nice...
mmm tasty
Manny Calavera
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256Mb of L2 or L3 !???!
I really dont think thats possible with todays or tommorows tech,or feasable from a cost perspective.The yields would be what? maybe less then 1%,and each chip would cost tens of thousands.
Surely you jest ??256Mb of L2 or L3 !???!
I really dont think thats possible with todays or tommorows tech,or feasable from a cost perspective.The yields would be what? maybe less then 1%,and each chip would cost tens of thousands.
i guess i didnt say L3, but that is what i ment.. 256mb of L3...(that much l2 would be
) based on ddr4, (maybe on die isent the right way...nothing saying it cant be off die like pentuim2's l2 cache) look at the current prices of ddr ram... we'er talking adding maybe 40$ tops to the cost of the chip on our end... maybe even less/edit.. off die would make for a very large package however... so its a trade off... if they use a package like the one found in the xbox 360, it wouldnt be so bad
Why are you so certain that amount of cache is necessary that you believe it's even worth to install it off-die? That's an anachronistic and disadvantageous scheme for any cache level in modern day processors. It would simply be too slow in relative terms. Although additional cache is welcome, 256MB is not required for optimal performance.i guess i didnt say L3, but that is what i ment.. 256mb of L3...(that much l2 would be
I don't think you fully realize how much cache memory you're implying here by stating an amount of 256MB. The transistor count alone would be nearly inconceivable with any present day or near future die process. It's several orders of magnitude greater than what is practical not to mention profitable with today's technology.