DDR5 Specifications releases.

Per the article, it can still be run with 2 DIMMs, and they still have 288 pins. Doesn't look like it will require more space on the mobo. Plus, the VRMs are moving to the DIMMs, which will free up some mobo area.
Missed that part, yay! I like my shoe box machines
 
Plus, the VRMs are moving to the DIMMs, which will free up some mobo area.
Hope this goes better than when Intel did it with their CPUs. Wonder if it's related to the whole '12v all the things' movement?
 
Hope this goes better than when Intel did it with their CPUs. Wonder if it's related to the whole '12v all the things' movement?
It could, it does have some benefits, but 12v is a big deal for SI’s and OEM’s and every bit helps. Hell my new Epyc 3251 is a 12v box. So cute and tiny...
 
Dual Channel on a single chip is the most interesting part of the DDR5 spec IMO. Going to be a tremendous help for compact devices that using integrated graphics and only ship with a single DIMM.

Curious how it will impact performance using 2 more DIMMS.
 
Dual Channel on a single chip is the most interesting part of the DDR5 spec IMO. Going to be a tremendous help for compact devices that using integrated graphics and only ship with a single DIMM.

Curious how it will impact performance using 2 more DIMMS.
I wonder what 4+ channels do for gaming machines.
 
I would expect OEMs to have 1 or 2 DIMM slots total in most configurations with only 1 dimm populated unless you pay for an upgrade.
 
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Probably nothing as quad channel memory shows negligible performance differences over dual channel right now.
But if you take software written for systems with 4 or more and run it on 2 you do see a pretty big hit.
 
It's more "channels" but not the same kind of channels used in DDR4 and older, they're half the size. FTA: "Rather than one 64-bit data channel per DIMM, DDR5 will offer two independent 32-bit data channels per DIMM"

It still takes two sticks to make 128 bits like we have now. The real change is that the burst length is doubled, which is what leads to the increased bandwidth. To do that, they needed to reduce the channel size.

Regular systems will move to quad channel, which still means 2 or 4 DIMMs per board, and HEDT to 8 channels (or more) with 4 or 8 DIMMs. Cheapskate OEMs will continue to ship with a single stick, halving the supported memory performance, because that's what they do.
 
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