Correct me if im wrong

[Redefined]

The Smithfield dual core cpu will not have hyperthreading. right?

 

[Tygerwoody]

in "theory" it will not

 

[Redefined]

damn, will we see a diff then? without hyperthreading?

 

[MalfurionStormrage]

The Extreme Editions will have HyperThreading.

Dual-core chips don't really need HT; all HT is doing is using unused registers to complement the existing processor core logic. With dual-core, you have a complete chip to handle the second thread.

Now, a Dual-core Dual-Xeon board would be phenomenal!

 

[Scali]

Dual-core chips don't really need HT; all HT is doing is using unused registers to complement the existing processor core logic. With dual-core, you have a complete chip to handle the second thread.

They do actually. The point of HT is not to handle two threads at a time, but to increase the efficiency of the processor by feeding instructions to units that would otherwise be idle.
Since the dual-core chips still use the same architecture, HT can still improve the efficiency in the same way.
Thing is just that it's better to have two inefficient units than one efficient one. Obviously two efficient units would be even better. Then again, this depends on the situation. If you generally only run one or two threads at a time, the rest is going to waste.

 

[MalfurionStormrage]

They do actually. The point of HT is not to handle two threads at a time, but to increase the efficiency of the processor by feeding instructions to units that would otherwise be idle.
Since the dual-core chips still use the same architecture, HT can still improve the efficiency in the same way.
Thing is just that it's better to have two inefficient units than one efficient one. Obviously two efficient units would be even better. Then again, this depends on the situation. If you generally only run one or two threads at a time, the rest is going to waste.

Remember, though, that HyperThreading only occurs because Intel built in about 8 million more transistors to use the "unused" registers. With dual-core, you build an entire chip to handle the second thread. Inefficient? Yes. However, it's a guarantee that there will be silicon to handle a second thread whereas HT assumes that the processor will have unused registers.

SMT doesn't come for free in the processor. Otherwise, AMD would have had HT a long time ago.

 

[EnderXC]

SMT doesn't come for free in the processor. Otherwise, AMD would have had HT a long time ago.

Please explain what SMT is, Sorry, and how would this effesct AMD being able to use a system like HT. Thanks.

 

[Ballz2TheWallz]

The Extreme Editions will have HyperThreading.

Dual-core chips don't really need HT; all HT is doing is using unused registers to complement the existing processor core logic. With dual-core, you have a complete chip to handle the second thread.

Now, a Dual-core Dual-Xeon board would be phenomenal!

quad dual cored HT xeon server farm

 

[xonik]

They do actually. The point of HT is not to handle two threads at a time, but to increase the efficiency of the processor by feeding instructions to units that would otherwise be idle. [...]

You're absolutely right. There is no good reason for Intel to drop HT, regardless of how many cores get piled on. However, marketing and product placement concerns may cause Intel to drop HT from their 800-series processors to provide the EE series with some product line separation.

SMT doesn't come for free in the processor. Otherwise, AMD would have had HT a long time ago.

The first paragraph makes sense, but I think you've got the wrong idea about SMT in your second paragraph. AMD's decision to not adopt an SMT scheme in its processors is because the K7 and K8 generations have relatively short pipelines. The current design keeps the pipeline busy enough that the second thread would rarely have time to go through the pipeline, so it's pretty useless.

Please explain what SMT is, Sorry, and how would this effesct AMD being able to use a system like HT. Thanks.

SMT is that "system like HT." HT is marketing speak for Intel's implementation of Simultaneous Multi-Threading, a feature also employed in IBM's new POWER series processors. AMD doesn't use an SMT implementation for reasons explained above.

 

[USMC2Hard4U]

So on the Upcomming Pentium Extreme Editions (Dual core w/ HT per core)

When we are handing 2 threads of data... will it be processed like:

1) Thread 1 will go to Core 1, Thead 2 will Go to Core 2

OR will it be:

2) Thread 1 will go to Core 1, Thread 2 will Go to HT on Core 1



Do I make sense?

 

[xonik]

I assume #1 would be the way it goes, as it would potentially yield higher performance. However, #2 saves power, so maybe they would go with that.

 

[USMC2Hard4U]

I assume #1 would be the way it goes, as it would potentially yield higher performance. However, #2 saves power, so maybe they would go with that.

What part along the way controls this... The CPU? The NorthBridge? or the OS Scheduler?

 

[MalfurionStormrage]

The first paragraph makes sense, but I think you've got the wrong idea about SMT in your second paragraph. AMD's decision to not adopt an SMT scheme in its processors is because the K7 and K8 generations have relatively short pipelines. The current design keeps the pipeline busy enough that the second thread would rarely have time to go through the pipeline, so it's pretty useless.

You are correct in that the long pipeline in the Pentium 4 is why HT works. However, it's not flipping a switch in software and Presto! we have SMT. Intel had to build in the silicon to take advantage of the inefficiency of the long pipeline design.

The point still stands, though, that SMT through HT is a hit-or-miss affair when you are dealing with a multithreaded application. SMP has all the silicon necessary to do "always on" multithreading.

Obviously, if you have two inefficient processors and HT will make them more efficient, you'd want to keep HT. If, though, you are trying to choose between one processor with HT or two non-HT processors, I'd take the latter every time. And we haven't even gone into the performance issues that currently can exist when enabling HT on SMP...

SMT is that "system like HT." HT is marketing speak for Intel's implementation of Simultaneous Multi-Threading, a feature also employed in IBM's new POWER series processors. AMD doesn't use an SMT implementation for reasons explained above.

Intel got SMT-smart when they got the folks from DEC (Alpha). SMT came before HT. HT is just Intel's marketing term for SMT.

 

[xonik]

You are correct in that the long pipeline in the Pentium 4 is why HT works. However, it's not flipping a switch in software and Presto! we have SMT. Intel had to build in the silicon to take advantage of the inefficiency of the long pipeline design.

Okay, obviously I know that it's not that easy. That's why I gave a reason why AMD is probably not implementing an SMT technology. AMD had patented its own SMT implementation in US Patent 6,122,727. They could incorporate one if they wanted to. When you said "SMT doesn't come for free," I thought you were talking about silicon space or something. HT doesn't take up enough silicon for it to be a major factor in whether to implement or not.

 

[(cf)Eclipse]

What part along the way controls this... The CPU? The NorthBridge? or the OS Scheduler?

there will probably be a little bit of extra logic built into the cpu to decide what to do based on what's currently being done

 

[Scali]

Remember, though, that HyperThreading only occurs because Intel built in about 8 million more transistors to use the "unused" registers. With dual-core, you build an entire chip to handle the second thread. Inefficient? Yes. However, it's a guarantee that there will be silicon to handle a second thread whereas HT assumes that the processor will have unused registers.

Read again what I said, it's not about handling two threads, it's about making the units in the CPU less idle.
And you mean execution units, not registers. And on the P4 core the assumption that there are unused execution units is a very realistic one. HT has already proved that it works, and it will work just the same no matter how many cores you use.
It's not a question of two cores without HT vs one with HT, but a question of two cores without HT vs two cores with HT. Obviously you still have the guarantee that there will be silicon available to handle a second thread. But added to that you have the ability to execute a third and fourth thread on the idle execution units.

 

[Scali]

What part along the way controls this... The CPU? The NorthBridge? or the OS Scheduler?

The OS scheduler handles it.
You can clearly notice that in Windows XP vs Windows 2000.
XP has an updated scheduler that is HT-aware, and it will avoid cases where using HT would be slower than not using HT. 2000 doesn't know the difference between SMT and SMP, so it treats a HT processor like two physical processors, which means that performance will sometimes be worse with HT on than with HT off. Sadly a lot of hardware review sites benchmarked the HT processors with the outdated Windows 2000 at the time, so HT got a bit of a bad rep at the start. Don't you just hate clueless internet 'journalists'...

Anyway, the OS will have to decide which thread runs where, and when.