Andes’ Core has RISC-V Vector Instruction Extension

[erek]

This is certainly a fascinating little micro-processing unit!

"Fully configured, the VPU can achieve over 30x speedup measured by the key functions in MobileNets, a popular convolutional neural network (CNN). Compared to the popular 128-bit scalar SIMD solution, the NX27V VPU offers 4 times more raw processing power per cycle with additional advantage due to the higher efficiency of vector instruction issuing.

Charlie Su commented, “From the vector microarchitecture to the memory subsystem, and all the ecosystems required to enable our licensees, at whatever scale and scope the licensee deems appropriate, Andes has taken RISC-V users to the frontiers of these embedded applications.”

The 27-series has expanded its memory subsystem to keep up with the bandwidth required to sustain the computational rate of the VPU, which will benefit all customers whether they use the VPU or not. The 27-series now supports multiple outstanding memory accesses inflight so the scalar and vector processors both don’t have to wait for the data during cache misses. In addition, cache pre-fetches allow the memory to prepare data in advance of processor’s needs, thus hiding potential cache misses. Finally, Andes Custom Extension (ACE) interface has been expanded to provide instruction customization to speed up control path as well as to widen data path into the core."


https://www.eetimes.com/andes-core-has-risc-v-vector-instruction-extension/

 

[defaultluser]

Sounds like they're just playing catch-up with ARM SVE.

Already used by the Fujitsu A64FX in a in-progress Post-K supercomputer. They also signed-on with Cray to bring the love to more companies/governments.

I don't hate on RISCV trying to give an alternative, but it's got a long way to go before it ends up in HPC server rooms. Even low-end Cloud Compute is falling to ARM by-default (just look at Amazon's Gravitron 2).

ARM has a 5 year head-start on servers, and there are enough competitors already that everyone can buy their own desired performance target. Not much room for RiscV5 to innovate in an already crowded market.