DeChache
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Why do I get the impression that you like to start problems.
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AMD Says Barcelona will be 40% faster than Core 2
- Thread starter LstBrunnenG
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Why do I get the impression that you like to start problems.
Actually the move from 286 to 386 is not much different than the move from K7 to K8 (or Northwood to Prescott if you like).
The actual CPU-design wasn't all that different. Slightly more cache (or well, the instruction-'cache' was just a tiny look-ahead window on the 386), and not much difference in terms of speed/IPC.
Main difference was the 32-bit mode.
And between the 386, there were also the 486 and Pentium which were considerably different. Especially 486 and Pentium are worlds apart (move to superscalar, and first steps on RISC-like dissection and execution of x86 instructions).
Pentium and Pentium Pro are also entirely different concepts (synchronized two-issue pipeline versus out-of-order execution with independent 'instruction ports' rather than a single pipeline as such).
I don't trust Intel or AMD. Let's see, no one, even AMD expected 4 X 4 to be
faster, WOW!
Yes, but the amount of changes to the core *are* an interesting feat.
And I think AMD is going to shoot itself in the foot by not lengthening the pipeline like Intel did.
Core was limited to ~2.5 GHz with the old pipeline length. Part of the reason why Core2 is such a good overclocker now is because the pipeline was lengthened by a few stages, which gives it a lot of headroom.
AMD is already pushing the K8-design with 3 GHz, and they haven't modified the pipeline length, so there won't be any improvements on clockspeed scaling other than manufacturing technology. And as we've seen lately, moving from 130 nm to 90 nm, and again from 90 nm to 65 nm, clockspeed doesn't scale up much anymore, without changing the CPU design.
Other than that I think trying to improve on x86's IPC is flogging a dead horse. I'm quite impressed that Core2 beat even the K8's impressive IPC, but I don't expect AMD to go much further. x86-code doesn't lend itself well to parallel execution because it was never designed to. So throwing everything at trying to improve IPC, while working with a low clockspeed limit is a bad move in my opinion.
Intel had a good idea going with Pentium 4, but they overshot their goal... The Core2 is much more conservative, but still aimed at clockspeeds well beyond 3 GHz, and that's where K8L is going to take a beating, I gather.
IPC wasnt that much better, but the pipeline was significantly overhauled due to the attempt at a scaler pipeline. It was a complete redesign in the way an architecture handles data.... The 486 was a 386 with a different name. The pentium classic was a failed attempt to make the existing 386 pipeline superscaler.
The pentium pro was the first architecture to implement a RISC-like superscaler pipeline that supported OoO execution to any significant degree, and was a significant overhaul in the way the architecture handled data.
alg7_munif
Supreme [H]ardness
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QFT!
I think you have some stuff mixed up.
A 486 is much faster in pretty much every instruction than a 386 (most simple instructions take 2 or more clks on 386, where 486 can do most stuff in 1 clk), while a 386 is only faster than a 286 in a few cases, mostly related to more optimized addressing/decoding of instructions, not the actual execution. You might want to get hold of opcodes.hlp and check some instruction timings.
Pentium Classic was even faster than 486, doing virtually everything in 1 clk now, and also had a massively improved FPU, compared to the old 387-like unit that was in the 486. And obviously the second pipeline. Pentium wasn't failed at all... in fact, well-optimized code for a Pentium can run even faster than on a PPro/K7/K8, IPC-wise. It was a giant leap from 486 in every way. Especially if you also consider the introduction of MMX later.
No , Yonah has a 13 stage pipeline and Core has 14.
Yonah was limited to 2.33GHz simply because of TDP.It had to fit inside 31w and the entire chip was designed accordingly.
QFT.
I thought Yonah has a 12-stage and Core2 has a 14 stage?
I can't say I disagree. Clock speed is AMD's biggest problem right now, and the 65nm transition is not going to give them much, especially at introduction.
(cf)Eclipse
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i have a feeling that it's somewhat of an architectural limit at this point.. some changes need to be made to the core itself to really get some gains.
AMD never EVER claimed their 65nm transition was going to be faster... it is the same as when they first moved to 90nm. The winchesters were not ever claimed to be faster then the newcastles.
AMD also never bid 4X4 as the conroe killer. The platform was built to satisfy hardcore tweakers and give the AMD lovers a fun stopgap to keep them from moving to conroe. 4X4 is extremely nitche, AMD never billed as anything more.
K7 and k8 lived up to their claims. This new architecture may very well be just as good as they are saying.
brucedeluxe169
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Arcygenical
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They never reaaaaally said it was supposed to. It's a hardcore server architecture that was supposed to bridge the gap between their "quadcoreless-ness" and Intel's Quads.
CALVIN AND HOBBES!
brucedeluxe169
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Correct me if I'm wrong but I remember Intel claiming to be 20% faster with out any benchmarks. Benchmarks came out quite some time later. I am sure in a month or two we will see benchmarks from AMD..
I remember nothing but Core will PWN AMD crap threads now that AMD has a chance to kick intel in the jewels all the zealots come out stick their finger in their ears and run around and scream like children " I CAN'T HEAR YOU BLAH BLAH BLAH"
You people need to pull your heads out yer asses and face the fact that competition breeds better products. Just as I said with Conroe I will believe it when I see it.
I remember nothing but Core will PWN AMD crap threads now that AMD has a chance to kick intel in the jewels all the zealots come out stick their finger in their ears and run around and scream like children " I CAN'T HEAR YOU BLAH BLAH BLAH"
You people need to pull your heads out yer asses and face the fact that competition breeds better products. Just as I said with Conroe I will believe it when I see it.
w1retap
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Well, if you think about it, its exactly like politics are in America. The Intel camp plays the role of libs, and AMD plays the role of repubs. The Intel side can claim whatever they want and blast bs all day long and people will blindly believe it. The AMD camp always has to be the ones providing solid evidence with a plan, but Intel folks just ignore it anyway. You see, its all about preaching tolerance and understanding, but they are so hypocritical its mind blowing.
Listen to this man. He speaks the truth.
Regardless of whether you're an AMD or Intel fanatic, if anyone here has common sense (which I'm sure most of you do), you'll most definitely want AMD's new K8L architecture to succeed; not out of fanaticism, but out of genuine understanding of the quote above. If K8L fails as a competative setup, you can rest assure that Intel will sit back and milk the Core2 line as much as they can. While Core2 is an excellent designed chip, either company (both AMD and Intel) that holds the reigning crown for too long will only stagnate the industry.
And that is not good for us consumers!
Manny Calavera
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I am starting to become a believer in these latest claims from AMD.I think that this new chip will be 80% faster then current and soon to be released C2D/C2Q's,but this will be AMD's last hurah of sorts,if they cant grab and hold real market share with this new line of chips.They have to become Pepsi to Intels Coke,as Ed said the other day.They cant borrow cash forever,something has to give.
They desperately need an extra fab or 3,and a sugar daddy.IBM ?..... I mean they just maxed out the biggest line of credit they have ever taken out;and have been downgraded by Wallstreet,have tons of debt,two straight losses,took on a ton more with ATI.And share prices are dropping.2 fabs,one which isnt really theirs.Was just days ago forced to lower already rock bottom cpu pricing,which cant be helping them in making $$$$,and Intel is right around the corner to forcing yet another price drop,the next allot bigger then last weeks.I dont see AMD's new line launching in the late summer at high prices,not if Intel keeps the pricing pressure on high,as they have been,and will continue to do for the forseeable future.Not to even mention Intels 45nm....
Maybe the best way to make money on AMD in 07 is short sells...
They desperately need an extra fab or 3,and a sugar daddy.IBM ?..... I mean they just maxed out the biggest line of credit they have ever taken out;and have been downgraded by Wallstreet,have tons of debt,two straight losses,took on a ton more with ATI.And share prices are dropping.2 fabs,one which isnt really theirs.Was just days ago forced to lower already rock bottom cpu pricing,which cant be helping them in making $$$$,and Intel is right around the corner to forcing yet another price drop,the next allot bigger then last weeks.I dont see AMD's new line launching in the late summer at high prices,not if Intel keeps the pricing pressure on high,as they have been,and will continue to do for the forseeable future.Not to even mention Intels 45nm....
Maybe the best way to make money on AMD in 07 is short sells...
What do you mean with "fundamentally the same"?
That they both run x86-code?
Way too vague.
It was 12 stages, and I'm not talking about TDP... Even if you overclocked (and obviously ignored TDP), it wouldn't go that much higher. Just like the P-M won't go far over 2 GHz, and Athlon64 is limited near 3 GHz.
No way would a Yonah-like chip reach anything near the 4 GHz that C2D currently reaches with overclocking on air, no matter what TDP you choose.
It's 13.There's no official info from Intel on how many stages Banias/Dothan/Yonah has except a comment : longer than P3 ( 10 ) and shorter than Core ( 14 ).Some folks at Aces did some tests and concluded 13 is the most likely.
Umh , no.
AMD's magic claims come from recycling old stuff.Here it is :
The magic 70% over Opteron and Woodcrest ( only 16% vs. Cloverton )
And the hurrah 40% ( which some correctly guessed to be SpecFP_rate )
Frankly , if K8L manages to be 10% on average faster than Cloverton it will be a good achievement.The 40% stuff is pure marketing.
Yes, and others concluded that 12 is the most likely... That doesn't change the point I was making though.
Agner Fog has even different opinions on the whole thing: http://www.agner.org/optimize/microarchitecture.pdf
He states that Pentium-M/Core are likely to be 3-4 stages longer than PPro, which would make them 13-14.
However, he also states that the Core2 pipeline is likely to be two stages longer than P-M/Core.
So either we take the figure of 14 stages for Core2 as a given, and then according to Agner Fog, the P-M and Core must be about 12...
Or we work from PPro upwards, and then P-M/Core would be 13-14 stages, and Core2 would be 15-16 stages.
Since P-M/Core are so comparable to Athlon64/Turion in terms of frequency scaling and IPC, I think it's most likely that they are 12 stages.
And since Core2 scales so well in clockspeed (and the argument that Fog gives about branch misprediction penalty), I fully agree with Agner Fog that there must be at least 2 extra stages in Core2.
So my money is on 12 for P-M/Core and 14 for Core2... Else it will probably 13 for P-M/Core and 15 for Core2.
Nevertheless, it doesn't matter for the point I was making.
What K8L will have to deal with.
http://hwzone.co.il/english-reviews/intel_apc_2006-eng/
Of course AMD and many folks here thought 4 X 4 would restore the Greenteam some pride. Others here suggested that just going to 65nm would get more MHz and the result would be a Closing of the GAP. Guys, don't shoot the messenger here.
http://hwzone.co.il/english-reviews/intel_apc_2006-eng/
Of course AMD and many folks here thought 4 X 4 would restore the Greenteam some pride. Others here suggested that just going to 65nm would get more MHz and the result would be a Closing of the GAP. Guys, don't shoot the messenger here.
I would have said it was the other way around.
Intel is a big bloated buerocratic empire that slowly reacts like the republican administration. AMD is more streamlined, slightly indecisive, aimed at the less rich, and kindof an underdog like the liberals. AMD also had the "grass roots" support for a long time - another trait of democrats.
I don't know how AMD can be said to be more like the repubs... unless you are basing it all on the fact that they are based in texas.
Lets try to keep politics out of it. I know you didnt start it, but Lets face it, politics is even more divisive then CPU's.....
there are teams?
Yes, hehehe! there are teams. I stand by what I said about $ X $ as I always have.
http://www.hardforum.com/showpost.php?p=1029505414&postcount=60
AMD on Quadcore.
Did I misread this?
http://www.hardforum.com/showpost.php?p=1029506323&postcount=79
http://www.hardforum.com/showpost.php?p=1029508761&postcount=113
visaris said:
Nice hedge but not good enough.
http://www.hardforum.com/showpost.php?p=1029509399&postcount=124
What I said about 4 X 4 06-02-2006, 10:18 AM unedited.
http://www.techreport.com/etc/2006q2...t/index.x?pg=1
I can also link to folks saying I was trashing AMD because I said 4 X 4 wouldn't be any faster than two Opterons on a similar system. This was long before the first tests. When performance rocks, AMD's shows it off to the world. When it is little to no improvement, it becomes a secrete. Not leaking K8L info, tests or etc.. is NOT a good sign from AMD.
Maybe it got lost in all the flames, but I also haven't seen anybody mention that AMD has a MUCH more efficient multicore architecture. I wouldn't be surprised in the least if AMD achieved better quad core performance relative to their dual core designs than Intel did. That could also lead to a large gap in benchmarks which adequately utilize all four cores.
There are no flames to speak of. If AMD was so much "more efficient" why are they getting spanked?
LstBrunnenG
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He means Barcelona will be four cores on one die, with efficient interconnects. This is arguably more efficient than Kentsfield's two dies which talk to each other through the FSB.
I mean AMD better worry about Core improvements and NOT gimmicks like interconntions and Native BS! Of cource I know what he meant.
LstBrunnenG
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Ummmm...eventually Intel will move to a single-die, quad-core Core, with "gimmicks" like interconnects as improvements.
No, Intel will move its ALREADY improved Core to Interconnects and CSI. Look at this way, what if Intel was ONLY talking about moving Netburst to Interconnects and CSI? Then I'd call the a Gimmick as well, hell, wouldn't you?
All I'm saying is that AMD would get better mileage out of talking about More IPC, improved FPU and etc... Not BS about Native Quad Core or superior HT BS! IMHO of course.
The interconnects on an Athlon X2 are so poor that they barely outperformed a Pentium D in an algorithm that I wrote.
We did some tests with lowering the HT-speed, and the Athlon performance dropped... which is probably an indication that this 'crossbar' that AMD speaks of, is tied to the HT-link, and internal core communication is no different than communicating between two physical CPUs over HT.
Since AMD apparently uses shared L3-cache, this is an indication that the core-communication isn't that hot. After all, the cache is there to ELIMINATE such communication. If the communication is AMD's advantage over Intel, then why are they moving to shared caches like Intel has already done on their Core2 Duo?
Note also that AMD shares at L3, while Intel shares at L2, so Intel has the advantage here.
AMD may have a slight advantage compared to Kentsfield, because it only has shared L2 per 2 cores, not globally (but this already greatly reduces FSB-traffic... especially when the OS/software is aware of the shared caches)... but eventually Intel will have a single-die version, probably with a single shared L2 cache for all cores.
We did some tests with lowering the HT-speed, and the Athlon performance dropped... which is probably an indication that this 'crossbar' that AMD speaks of, is tied to the HT-link, and internal core communication is no different than communicating between two physical CPUs over HT.
Since AMD apparently uses shared L3-cache, this is an indication that the core-communication isn't that hot. After all, the cache is there to ELIMINATE such communication. If the communication is AMD's advantage over Intel, then why are they moving to shared caches like Intel has already done on their Core2 Duo?
Note also that AMD shares at L3, while Intel shares at L2, so Intel has the advantage here.
AMD may have a slight advantage compared to Kentsfield, because it only has shared L2 per 2 cores, not globally (but this already greatly reduces FSB-traffic... especially when the OS/software is aware of the shared caches)... but eventually Intel will have a single-die version, probably with a single shared L2 cache for all cores.
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