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AMD 90 nanometer
- Thread starter Frallan
- Start date
topdragon147
Gawd
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- Jun 9, 2004
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nothing yet. but it looks like right now they will have less problems than intel with 90nm
XtremeSystems.org has benchmarks, though you need to register to see them. Otherwise, AMD senior executives said that production began sometime in Q2 of this year and volume production is still on target for Q3 2004.
Supposedly, these processors will be made on a premium low-k dielectric material for greatly reduced current leakage, have better branch prediction and prefetching mechanisms, and feature full SSE3 instruction set support (with the exception of HyperThreading related instructions).
Supposedly, these processors will be made on a premium low-k dielectric material for greatly reduced current leakage, have better branch prediction and prefetching mechanisms, and feature full SSE3 instruction set support (with the exception of HyperThreading related instructions).
low-k doesn't reduce leakage current. (It actually will probably inscrease it some.)
It reduces RC delay and to a lesser extent capacticance (which lowers dynamic power dissipation). But primarily it's there to reduce the dealy over the interconnects, which at 90nm are anywhere from a signifigant to a dominate factor in propogation delay depending on the length of the interconnect. (Gate + interconnect dealy with Cu + low K at 90nm is about the same as it was with AL + SiO2 at 250nm, it's just now the gate's delay is 3-4ps and the interconnect is 8 or 10 instead of the other way around).
But yea, we should see them early to mid fall in quantity,
and rumor has it they're around 5% faster than a 939 Newcastle at the same clock speed.
Overclocking is going to depend alot on how well AMD deals with the power dissipation. SOI + "Black Diamond" low k dielectrics will keep capacitance down.
Leakage current remains an unknown.
It reduces RC delay and to a lesser extent capacticance (which lowers dynamic power dissipation). But primarily it's there to reduce the dealy over the interconnects, which at 90nm are anywhere from a signifigant to a dominate factor in propogation delay depending on the length of the interconnect. (Gate + interconnect dealy with Cu + low K at 90nm is about the same as it was with AL + SiO2 at 250nm, it's just now the gate's delay is 3-4ps and the interconnect is 8 or 10 instead of the other way around).
But yea, we should see them early to mid fall in quantity,
and rumor has it they're around 5% faster than a 939 Newcastle at the same clock speed.
Overclocking is going to depend alot on how well AMD deals with the power dissipation. SOI + "Black Diamond" low k dielectrics will keep capacitance down.
Leakage current remains an unknown.
Are you sure? IBM's Microelectronics site says this about low-k:FreiDOg said:low-k doesn't reduce leakage current. (It actually will probably inscrease it some.)
It reduces RC delay and to a lesser extent capacticance (which lowers dynamic power dissipation). But primarily it's there to reduce the dealy over the interconnects, which at 90nm are anywhere from a signifigant to a dominate factor in propogation delay depending on the length of the interconnect. (Gate + interconnect dealy with Cu + low K at 90nm is about the same as it was with AL + SiO2 at 250nm, it's just now the gate's delay is 3-4ps and the interconnect is 8 or 10 instead of the other way around)
"Crosstalk" sounds a lot like leakage current to me...Low-K Dielectric
IBM has now announced another milestone in semiconductor manufacturing: a new method for building microchips that can deliver up to a 30 percent boost in computing speed and performance. This new manufacturing technique uses a material technologists refer to as a "low-k dielectric" to meticulously shield millions of individual copper circuits on a chip. IBM is the first to use the low-k dielectric technique with copper wiring.
Chip wires are currently insulated with silicon dioxide. As wires are packed closer and closer together, a small amount of unwanted charge builds up between nearby wires, causing electrical "crosstalk" that hinders performance. IBM has figured out how to replace the silicon dioxide with a more effective low-k dielectric shield, helping electronic signals move faster through the chip, improving overall performance.
GodsMadClown
2[H]4U
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- Aug 9, 2002
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- 3,112
http://www.techreport.com/onearticle.x/7204
It's very smart to move the volume products to 90 nm first. While it's not clear what clock scaling might be like at 90 nm, it's a sure bet that you'll be able to cram more chips per wafer at 90 nm. The more chips/wafer benefit dovetails very nicely with the volume processor market strategy. It's all about the shareholders. AMD is maturing, and they need nice stable profit growth, not cowboy risk-taking.
AMD still says it's progressing well on its transition to a 90nm fab process (indeed, it seems the first 90nm mobile parts
are now shipping). Unlike Intel, AMD will not be trying to produce a significantly redesigned chip as its first 90nm part; the first 90nm processors from AMD should be very similar to its current CPUs. The company continues to maintain that the power and thermal characteristics of its 90nm processors are quite decent.
Also, interestingly enough, the first 90nm parts from AMD will not be high-end parts. Instead, AMD will transition its less expensive, higher volume products to 90nm first. This move makes sense from an economics standpoint, but it also raises questions about whether the move to 90nm will allow significantly higher clock speeds than current 130nm Opterons and Athlon 64s. We'll see.
It's very smart to move the volume products to 90 nm first. While it's not clear what clock scaling might be like at 90 nm, it's a sure bet that you'll be able to cram more chips per wafer at 90 nm. The more chips/wafer benefit dovetails very nicely with the volume processor market strategy. It's all about the shareholders. AMD is maturing, and they need nice stable profit growth, not cowboy risk-taking.
Crosstalk is line to line/ground capacitcance or inductance.
As you move the interconnects closer and closer together while retaining a strong dielectric insulator between them, they are increasingly acting like a plate capacitor. To counter that, you need to lower the dielectric strength to reduce the capacitive value. Which means then less time and power is spent charing the 'capacitor' and the signal can propogate faster.
Better explination of crosstalk (pdf).
High vs Low k and their impact on power dissipation and delay (pdf)
Intel presentation on issues with sub 100nm processes (pdf) Start on page 37 for a discussion of noise issues, dominated by capacitive and inductive coupling.
As you move the interconnects closer and closer together while retaining a strong dielectric insulator between them, they are increasingly acting like a plate capacitor. To counter that, you need to lower the dielectric strength to reduce the capacitive value. Which means then less time and power is spent charing the 'capacitor' and the signal can propogate faster.
Better explination of crosstalk (pdf).
High vs Low k and their impact on power dissipation and delay (pdf)
Intel presentation on issues with sub 100nm processes (pdf) Start on page 37 for a discussion of noise issues, dominated by capacitive and inductive coupling.
xonik said:Are you sure? IBM's Microelectronics site says this about low-k:"Crosstalk" sounds a lot like leakage current to me...
Ermm no.
Crosstalk is more like interferance (think static on your radio).. Leakage current is wasted electricity. (more heat produced)
Not technically correct, but somewhat logically.
==>Lazn
GodsMadClown
2[H]4U
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http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543~89449,00.html
SUNNYVALE, CA -- August 17, 2004 --AMD (NYSE: AMD) announced today that it is achieving a smooth transition to 90 nanometer (nm) manufacturing and has shipped low-power 90nm Mobile AMD Athlon 64 processors for thin and light notebooks (previously codenamed Oakville) for revenue. Manufacturers are expected to launch systems based on the new 90nm Mobile AMD Athlon 64 processors in the coming months.
September/October timeframe for the mobile parts, October/November for the desktop parts. I am not sure whether there will be a 90 nanometer Socket 754 part faster than the 3700+, though.Frallan said:Mid Q3 for the Mobile A64 then perhaps end Q3 for the desktop?
When do U think/guess/know the Socket 754/939 will arrive?