Shortages of a key chip packaging technology are constraining the supply of some processors, Taiwan Semiconductor Manufacturing Co. Ltd. chair Mark Liu has revealed.
Liu made the remarks during a Wednesday interview with Nikkei Asia on the sidelines of SEMICON Taiwan, a chip industry event. The executive said that the supply shortage will likely take 18 months to resolve.
Historically, processors were implemented as a single piece of silicon. Today, many of the most advanced chips on the market comprise not one but multiple semiconductor dies that are manufactured separately and linked together later. One of the technologies most commonly used to link dies together is known as CoWoS.
https://siliconangle.com/2023/09/08/tsmc-says-chip-packaging-shortage-constraining-processor-supply/
TSMC reportedly intends to expand its CoWoS capacity from 8,000 wafers per month today to 11,000 wafers per month by the end of the year, and then to around 20,000 by the end of 2024.
TSMC currently has the capacity to process roughly 8,000 CoWoS wafers every month. Between them, Nvidia and AMD utilize about 70% to 80% of this capacity, making them the dominant users of this technology. Following them, Broadcom emerges as the third largest user, accounting for about 10% of the available CoWoS wafer processing capacity. The remaining capacity is distributed between 20 other fabless chip designers.
Nvidia uses CoWoS for its highly successful A100, A30, A800, H100, and H800 compute GPUs.
AMD's Instinct MI100, Instinct MI200/MI200/MI250X, and the upcoming Instinct MI300 also use CoWoS.
https://www.tomshardware.com/news/amd-and-nvidia-gpus-consume-lions-share-of-tsmc-cowos-capacity
Taiwan Semiconductor Manufacturing Co. Chairman Mark Liu said the squeeze on AI chip supplies is "temporary" and could be alleviated by the end of 2024.
Liu revealed that demand for CoWoS surged unexpectedly earlier this year, tripling year-over-year and leading to the current supply constraints. The company expects its CoWoS capacity to double by the end of 2024.
https://ca.investing.com/news/stock...-amid-cowos-capacity-constraints-93CH-3101943
Liu made the remarks during a Wednesday interview with Nikkei Asia on the sidelines of SEMICON Taiwan, a chip industry event. The executive said that the supply shortage will likely take 18 months to resolve.
Historically, processors were implemented as a single piece of silicon. Today, many of the most advanced chips on the market comprise not one but multiple semiconductor dies that are manufactured separately and linked together later. One of the technologies most commonly used to link dies together is known as CoWoS.
https://siliconangle.com/2023/09/08/tsmc-says-chip-packaging-shortage-constraining-processor-supply/
TSMC reportedly intends to expand its CoWoS capacity from 8,000 wafers per month today to 11,000 wafers per month by the end of the year, and then to around 20,000 by the end of 2024.
TSMC currently has the capacity to process roughly 8,000 CoWoS wafers every month. Between them, Nvidia and AMD utilize about 70% to 80% of this capacity, making them the dominant users of this technology. Following them, Broadcom emerges as the third largest user, accounting for about 10% of the available CoWoS wafer processing capacity. The remaining capacity is distributed between 20 other fabless chip designers.
Nvidia uses CoWoS for its highly successful A100, A30, A800, H100, and H800 compute GPUs.
AMD's Instinct MI100, Instinct MI200/MI200/MI250X, and the upcoming Instinct MI300 also use CoWoS.
https://www.tomshardware.com/news/amd-and-nvidia-gpus-consume-lions-share-of-tsmc-cowos-capacity
Taiwan Semiconductor Manufacturing Co. Chairman Mark Liu said the squeeze on AI chip supplies is "temporary" and could be alleviated by the end of 2024.
https://asia.nikkei.com/Business/Te...-AI-chip-output-constraints-lasting-1.5-years"Currently, we can't fulfill 100% of our customers' needs, but we try to support about 80%. We think this is a temporary phenomenon. After our expansion of [advanced chip packaging capacity], it should be alleviated in one and a half years."
Liu revealed that demand for CoWoS surged unexpectedly earlier this year, tripling year-over-year and leading to the current supply constraints. The company expects its CoWoS capacity to double by the end of 2024.
https://ca.investing.com/news/stock...-amid-cowos-capacity-constraints-93CH-3101943
CoWoS is cool
"AI and HPC megatrends are boosting requirements for advanced packaging."
"Current demand for packaging technologies like chip-on-wafer-on-substrate (CoWoS) far outpaces the available capacity, which is why TSMC is presently accelerating efforts to boost such production capacity, the report says.
TSMC reportedly pledged to process an extra 10,000 CoWoS wafers for Nvidia throughout the duration of 2023. Given Nvidia gets about 60-ish A100/H100 GPUs per wafer (H100 is only slightly smaller), that would mean an additional ~600,000 top-end data center GPUs.
The projections imply an increase of about 1,000 to 2,000 wafers each month for the rest of this year. TSMC's monthly CoWoS output oscillates between 8,000 and 9,000 wafers, so supplying Nvidia with an additional 1,000 to 2,000 wafers monthly will significantly enhance the utilization rate of TSMC's high-end packaging facilities. This upsurge might lead to a supply scarcity of CoWoS services for other industry players due to the heightened demand, and that's why TSMC reportedly plans to expand its advanced packaging capacities.
TSMC's production increase is reportedly aimed at supporting the escalating demand for Nvidia's AI chips, which are extensively employed across the industry. For instance, Google recently launched its new A3 supercomputer, based on Nvidia's H100, boasting 26 ExaFLOPS of AI performance. Similarly, several prominent firms such as Microsoft, Oracle, and even Elon Musk's upcoming AI venture have procured tens of thousands of Nvidia's AI GPUs in the past few months.
It remains unclear which specific compute GPUs Nvidia intends to ramp up, as its current range includes the A100, A30, H100, and China-exclusive A800 and H800 GPUs. All of TSMC's facilities that provide advanced packaging services are located in Taiwan."
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Source: https://www.tomshardware.com/news/t...nced-packaging-capacity-to-meet-nvidia-demand